Pre-Silicon Signoff Lead - 19498
About The Position
Synopsys is hiring a Pre-Silicon Signoff Lead to help develop, verify, and deliver high-speed connectivity IP. The role focuses on simulation and sign-off activities for next-generation silicon products, including IP involving PCIe and Ethernet protocols. The successful candidate will work across analog, digital, and hardware teams to ensure thorough verification and reliable product performance, and will provide technical support and troubleshooting for customers. The position contributes to verification planning and execution across multiple teams and flows, including analog, cosimulation, digital verification, gate-level simulation (GLS), formal methods, and emulation. It also involves coordinating hardware regression plans with firmware and algorithms teams, reporting verification metrics, and producing sign-off collateral. The role is based in Sunnyvale, California, and is not remote eligible.
Requirements
- MSc or PhD in Electrical or Computer Engineering.
- 10+ years of relevant industry experience.
- Deep expertise in high-speed protocols, including PCIe and Ethernet.
- Proficiency in SystemVerilog, object-oriented verification, UVM/VMM/OVM, assertion-based verification, and coverage closure.
- Strong scripting and programming skills in Python, TCL, Perl, and C/C++.
- In-depth knowledge of high-speed analog and digital design principles.
- Familiarity with analog, cosimulation, digital verification, GLS, formal methods, and emulation flows.
- Proven leadership in testbench architecture, planning, cross-site collaboration, and mentoring.
- Strong communication, analytical, collaboration, adaptability, and customer-support skills.
Responsibilities
- Collaborate with analog, digital, and hardware teams to ensure holistic design and verification coverage.
- Develop and maintain comprehensive IP simulation and verification plans aligned with reliability and performance targets.
- Review execution against verification plans through regular meetings with analog, cosimulation, digital verification, GLS, formal, and emulation teams.
- Establish, monitor, and report verification metrics, including functional, code, and assertion coverage.
- Coordinate with the Firmware & Algorithms Lead and Digital FW Developers to develop hardware regression plans for successive firmware releases.
- Deliver verification collateral, including test plans, test cases, coverage reports, and sign-off documentation.
- Support customers with technical challenges and troubleshooting.
- Mentor engineers and contribute leadership in testbench architecture, planning, and cross-site collaboration.
Benefits
- Comprehensive health, wellness, and financial benefits
- May be eligible for an annual bonus, equity, and other discretionary bonuses
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What This Job Offers
Job Type
Full-time
Career Level
Senior
