About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) delivers infrastructure and foundational technologies for Microsoft’s online businesses and Azure platform. Within SCHIE, Compute Silicon & Manufacturing Engineering (CSME) designs, develops, manufactures, and packages Microsoft computer chips, including Azure Cobalt. The Verification & Validation team works to improve the planning, quality, delivery, scale, and sustainability of Microsoft cloud hardware. The Senior SoC HW (Power & Performance) Validation Engineer owns post-silicon power and performance validation strategy and execution, delivering an optimized and tuned system. The role also contributes to pre-silicon validation and verification, collaborates across engineering organizations, and provides technical leadership and mentorship. The position requires meeting Microsoft and applicable customer or government security screening requirements, including a Microsoft Cloud Background Check and eligibility to access export-controlled information.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Eligibility to access export-controlled information; the successful candidate must provide proof of citizenship, U.S. residency, or other protected status for assessment, with citizenship verified using a valid passport or other applicable documents for lawful permanent residents, refugees, and asylees.

Nice To Haves

  • Understanding of SoC system-level and platform-level functionality, defining silicon validation requirements, and writing scripts or software in industry-standard languages such as Python or C/C++.
  • Proficient communication, collaboration, and teamwork skills, with the ability to lead, grow, and contribute to diverse and inclusive teams.
  • Experience in verification, logic development, analog validation, or validation tools as part of a CPU, SoC, and/or IP development team.
  • Leadership skills.
  • Demonstrated validation expertise in one or more areas, including power validation, performance testing and tuning, automation, content creation, or tools and scripts development.
  • Ability to develop synthetic SoC validation content for core, coherency, memory, and I/O to run in bare-metal and OS environments.
  • Ability to develop sophisticated tools and scripts supporting SoC validation debug, including maximum power, current transients, and register dumps.
  • Understanding of board-level schematics.
  • Understanding of system-level software and firmware.
  • Experience running silicon content on pre-silicon platforms such as emulation or FPGA.
  • Demonstrated success in hardware/software debug efforts.

Responsibilities

  • Own post-silicon Power & Performance validation strategy and execution, including performance, power, thermal, functional, and electrical characterization across workloads and operating conditions.
  • Define silicon performance and power characterization methodology across PVT, voltage/frequency operating points, DVFS, power states, and representative system workloads.
  • Develop and drive performance validation plans covering compute, memory, interconnect, I/O, power management, and system-level workload behavior.
  • Define, guide, and contribute to silicon debug, telemetry, profiling, and analysis capabilities to identify performance bottlenecks, power inefficiencies, and unexpected silicon behavior.
  • Partner with architecture, design, firmware, OS, verification, platform, and workload teams to translate product performance and power goals into measurable post-silicon validation requirements.
  • Analyze performance, power, and thermal data to identify bottlenecks, regressions, and optimization opportunities, and drive issues from detection through root cause and resolution.
  • Develop validation environments, automation, workloads, benchmarks, tools, scripts, and methodologies for efficient Power & Performance characterization and debug.
  • Execute post-silicon validation and characterization, triage complex cross-layer issues, and correlate behavior across silicon, firmware, OS, platform, and workload layers.
  • Drive performance-per-watt, workload efficiency, and system-level optimization in partnership with architecture and engineering teams.
  • Engage with design and verification partners to shift Power & Performance validation left by improving pre-silicon modeling, coverage, correlation, and early issue detection.
  • Apply experience to pre-silicon Power & Performance verification, including workload definition, performance modeling, test development, and pre-to-post-silicon correlation.
  • Drive continuous improvement in validation methodology, automation, telemetry, and analytics to find issues earlier and accelerate root cause.
  • Coordinate across organizations on Power & Performance requirements, milestones, dependencies, deliverables, and execution.
  • Provide technical leadership, coaching, and mentorship in performance analysis, power management, workload characterization, silicon debug, and validation methodology.
  • Adapt as silicon architectures, workloads, firmware, and system requirements evolve, and build alignment across organizational boundaries.
  • Deliver high-quality, data-driven Power & Performance results on schedule to enable product decisions and readiness.
  • Provide technical leadership with respect, integrity, engineering rigor, and effective customer focus.

Benefits

  • Benefits and other compensation may be available; details are provided through the linked Microsoft careers pay and benefits information.
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