Principal SoC HW Analog/Functional Validation Engineer
About The Position
Microsoft’s Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) organization develops and operates infrastructure for Microsoft’s cloud services. Within SCHIE, the Compute Silicon & Manufacturing Engineering (CSME) organization designs, develops, manufactures, and packages custom chips, including Azure Cobalt. The Verification and Validation team helps ensure cloud hardware manufacturing quality, delivery, scale, and sustainability. The Cloud Compute Development Organization is seeking a Principal SoC HW (Analog/Functional) Validation Engineer for its post-silicon functional and/or power/performance validation team. This technical individual contributor will own post-silicon validation in an area such as PCIe, functional I/O, or electrical/analog interfaces. The role involves developing validation strategies and collateral, implementing and executing tests, debugging failures, and improving designs and validation methods in collaboration with cross-functional partners. The engineer will also provide technical guidance and mentorship, contribute to pre-silicon verification, and help deliver high-quality results on schedule.
Requirements
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3+ years of technical engineering experience; or a master's degree in one of these fields and 6+ years of experience; or a bachelor's degree in one of these fields and 8+ years of experience; or equivalent experience.
- Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
- Ability to meet export-control access eligibility requirements; the successful candidate must provide proof of citizenship, U.S. residency, or other protected status, with citizenship verified using a valid passport and certain other statuses verifiable through applicable alternative documents.
- Applied understanding of computer architecture and CPU/SoC validation principles, including SoC subsystem, SoC system-level, and platform-level functionality.
- Ability to write scripts or software using industry-standard languages such as Python or C/C++.
- Proficient communication, collaboration, and teamwork skills, including ability to contribute to diverse and inclusive teams.
- Experience in verification, logic development, analog validation, or validation tools as part of a CPU, SoC, or IP development team.
- Demonstrated leadership skills.
- Demonstrated validation expertise in at least one area: functional I/O interfaces; electrical interfaces such as SerDes, I/O, high-speed interconnect, or analog circuits; power and performance; or automation, content creation, or tools/scripts development.
Nice To Haves
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 5+ years of technical engineering experience; or a master's degree in one of these fields and 8+ years of experience; or a bachelor's degree in one of these fields and 12+ years of experience; or equivalent experience.
- At least one year of experience working on or leading projects from beginning to end.
- Ability to develop synthetic SoC validation content for core, coherency, memory, and I/O, for both bare-metal and OS environments.
- Ability to develop sophisticated tools and scripts for SoC validation debug, such as maximum-power, current-transient, and register-dump activities.
- Understanding of board-level schematics.
- Understanding of system-level software and firmware.
- Experience running silicon content on pre-silicon platforms such as emulation or FPGA.
- Demonstrated success in hardware/software debug efforts.
- Hands-on experience debugging silicon failures using on-chip debug features such as trace or JTAG, and test equipment such as oscilloscopes, protocol analyzers, bit-error-rate testers, or logic analyzers.
Responsibilities
- Own post-silicon validation for PCIe, functional I/O, or electrical/analog interfaces.
- Define, guide, and contribute to implementation of silicon debug tools and capabilities.
- Develop expertise in high-speed I/O interface architecture and implementation, including PCI, CXL, and PLL, and how interfaces interact with the SoC, platform, and software.
- Provide technical guidance, coaching, and mentorship to other engineers.
- Develop validation strategy, requirements, environments, tools, and methodologies, including debug-board and hardware/software requirements.
- Write test plans and implement them by developing test content, scripts, tools, and other validation collateral.
- Execute post-silicon content and triage and debug failures.
- Work with partners to improve designs, validation plans, collateral, and methodology to prevent, reduce, or detect bugs more effectively.
- Collaborate with and influence architects, logic designers, verification engineers, post-silicon validators, and IP and tool providers.
- Deliver high-quality results on schedule and provide technical leadership with respect and integrity.
- Apply expertise to pre-silicon verification plans, tests, and debug for the assigned area.
- Learn and adapt in a complex, dynamic environment and contribute to an inclusive, collaborative team culture.
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What This Job Offers
Job Type
Full-time
Career Level
Principal
