Senior Principal Design Verification Engineer

Microsoft • Redmond, WA

2d • $165,600 - $331,200

About The Position

Microsoft’s Silicon, Cloud Hardware, and Infrastructure Engineering organization develops infrastructure and foundational technologies for Microsoft’s online services and Azure platform. The AI Silicon Engineering SoC Design Verification team verifies Microsoft AI accelerators in collaboration with systems, firmware, architecture, design, validation, and product engineering teams.

The Senior Principal Design Verification Engineer will architect and drive complex pre-silicon verification for AI accelerators, including SoC security verification, from block through chip and system levels, and contribute to post-silicon validation. The role includes developing verification environments, plans, and tests; defining SoC security architecture and threat models; and creating verification components and automation. The engineer will address complex quality and design challenges, debug failures, and work with cross-site teams using Agile development practices.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 7+ years of technical engineering experience; or a master's degree in one of these fields and 10+ years of experience; or a bachelor's degree in one of these fields and 12+ years of experience; or equivalent experience.
• Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
• Must satisfy export-control eligibility requirements and provide proof of citizenship, U.S. permanent residency, or other protected status; citizenship is verified with a valid passport, with other applicable documents accepted for lawful permanent residents, refugees, and asylees.

Nice To Haves

• CPU, graphics, or NPU security architecture or microarchitecture experience.
• Experience architecting confidential computing solutions for workload isolation, memory protection and encryption, trusted execution, attestation, and data-in-use protection.
• Experience owning hardware security microarchitecture, including key management, cryptography, secure storage, anti-rollback, access control, and hardware trust boundaries.
• Experience driving end-to-end SoC security across compute, memory, I/O, chip-to-chip interfaces, firmware, and accelerators.
• Ability to apply verification principles, testbench architectures, and scalable stimulus generation to comprehensive security verification.
• Experience partnering across RTL, firmware, design verification, physical design, platform, and security teams on threat analysis, security verification, vulnerability closure, and silicon signoff.

Responsibilities

• Create complex verification environments and tests for pre-silicon functional verification at block, chip, and system levels; develop reference models and support post-silicon validation.
• Work with architects and design engineers to create verification plans covering strategy, environments, tests, and requirements for IP, subsystem, and SoC verification; drive test plans and test development for complete feature coverage.
• Define SoC security architecture and threat models, including secure boot, root of trust, identity, isolation, privilege, debug, lifecycle, and recovery.
• Develop verification components, including scoreboards, sequences, constraints, assertions, and functional coverage, as well as Makefiles and scripts for scalable verification.
• Develop and implement technical solutions to complex quality and design challenges; triage and debug testbench, simulation, and emulation failures.
• Apply Agile development methods, including code reviews, sprint planning, and frequent deployment, and collaborate with teams across sites and geographies.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Ph.D. or professional degree