Principal Design Verification Engineer

Microsoft•Raleigh, NC
•$142,800 - $304,200

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) builds and operates the infrastructure and foundational technologies supporting Microsoft’s online services and Azure. Within SCHIE, the Compute Silicon & Manufacturing Engineering organization designs, develops, manufactures, and packages computer chips, including Azure Cobalt. The Verification & Validation team helps ensure cloud hardware manufacturing achieves its goals for planning, quality, delivery, scale, and sustainability. The Principal Design Verification Engineer will contribute to verification of Fabric Top subsystem integration and help deliver reliable, high-quality cloud infrastructure.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 3 years of technical engineering experience; or a master's degree in one of these fields and at least 6 years of experience; or a bachelor's degree in one of these fields and at least 8 years of experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Must provide proof of citizenship, U.S. residency, or other protected status to establish eligibility for access to export-controlled information; citizenship will be verified with a valid passport, and applicable alternative documents may be used by lawful permanent residents, refugees, and asylees.

Nice To Haves

  • Experience with one or more of fabric interconnects, coherency, CHI, AMBA, PCIe, CXL, protocol bridges, or memory subsystems.
  • Experience architecting and developing UVM verification environments, assertions, checkers, and coverage models.
  • Experience driving IP verification across multiple product cycles, from definition to silicon, including writing IP/block or subsystem-level test plans, developing tests, debugging failures, and achieving coverage signoff.
  • Hands-on technical leadership, such as creating bottom-up schedules, coordinating work across a team, driving verification closure, or resolving cross-team technical problems.
  • Experience with Formal Verification and assertion-based verification methodologies.
  • Proficiency with Python or similar scripting languages for automation and data analysis.
  • Experience applying AI-assisted tools to engineering and verification workflows.

Responsibilities

  • Own or lead functional or performance verification for one or more aspects of Fabric Top subsystem integration, including coherency, traffic flows to and from memory and PCIe/CXL endpoints, and end-to-end interconnect functionality.
  • Partner with architecture, design, and verification teams to define verification strategies, test plans, and signoff criteria.
  • Develop and enhance UVM and/or Formal verification environments, performance measurement tools, automation infrastructure, and reusable collateral.
  • Drive bug discovery and root-cause analysis using simulation, formal analysis, assertions, coverage, and debug.
  • Improve verification productivity through automation, methodologies, and AI-driven solutions.
  • Coach and mentor engineers in verification methodologies and best practices.
  • Demonstrate Microsoft core values, including customer focus, adaptability, collaboration, growth mindset, drive for results, influence for impact, judgment, and diversity and inclusion.
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