Senior Physical Design Methodology Engineer, Innovus Flows

NVIDIA•Austin, TX

7d•$168,000 - $310,500

About The Position

NVIDIA is seeking a physical design engineer to join its physical design (PD) methodology team. This role will drive innovation in PD across all of NVIDIA's product lines, including Datacenter AI, HPC, Networking, Robotics, Autonomous driving, and gaming. As NVIDIA's chip cycle shortens, this position addresses the challenges faced by physical design teams in delivering high PPA (Power, Performance, Area) at scale and in the shortest possible time. The work in physical design methodology directly enables NVIDIA's speed to market for industry-leading chip hardware. This role offers a unique opportunity to innovate at the forefront of process technology, EDA tools, and PD flows through collaboration with RTL, synthesis, DFT, foundry, and timing teams to push the boundaries of physical design at scale.

Requirements

MS in Electrical or Computer Engineering (or equivalent experience)
Minimum 7 years of experience in Physical Design; emphasis on methodology and flow development is highly preferred
Proven track record of PPA improvement on high performance and low power designs in advanced technology nodes
Strong understanding of physical design optimization and routing methodologies at place, cts, route and postroute, especially power and area efficient setup and hold optimization
Strong background in STA, extraction, timing and RC correlation
Experience in low power design with UPF, and use of FSDB/SAIFs for power optimization
Solid understanding of EM and IR analysis and closure
Understanding of synthesis, hierarchical design, pinning and budgeting flows
Experience with power distribution networks, Design for Yield and Manufacturability and thermal management
Expertise and in-depth knowledge of industry standard EDA tools and proficiency in programming and scripting languages, such as TCL, Perl, Python, and C++

Nice To Haves

Experience applying ML models, LLMs, and agentic AI techniques to EDA/PD problems (analytics, prediction, optimization)
Proficiency with data analysis/ML libraries (e.g., NumPy, SciPy, scikit-learn, PyTorch, etc.)
Proficiency in Cadence EDA tool suite – Innovus/genus/tempus/quantus/joules etc.

Responsibilities

Developing innovative physical design methodologies for implementation of GPU, CPU, Network processors and SOC, with emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes
Work with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all our product lines
Use AI/ML approaches to CAD to improve design performance and turnaround time, while improving efficiency and productivity of designers