Senior Physical Design Engineer

Saxon Global•Sunnyvale, CA

About The Position

The Senior Physical Design Engineer will drive RTL synthesis and optimization to achieve performance, power, and area (PPA) goals. The role includes floor planning complex ASIC/SoC designs, supporting timing closure, analyzing netlists, and collaborating across architecture, RTL, verification, and physical design teams to achieve design convergence. The engineer will also participate in design reviews and contribute to process and methodology improvements.

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 10+ years of industry experience in ASIC/SoC physical design.
  • Strong hands-on experience in ASIC/SoC physical design.
  • Expertise in RTL synthesis and timing optimization.
  • Solid experience with floor planning for advanced technology nodes.
  • Strong understanding of netlist optimization and physical implementation methodologies.
  • Experience collaborating with RTL/design teams to improve design quality and implementation efficiency.
  • Excellent communication and cross-functional collaboration skills.

Nice To Haves

  • Experience with industry-standard EDA tools for synthesis and physical design.
  • Strong understanding of timing, congestion, power, and area optimization techniques.
  • Experience working on high-performance CPU, GPU, AI/ML, or networking SoCs.

Responsibilities

  • Drive RTL synthesis and optimization to achieve performance, power, and area (PPA) goals.
  • Perform floor planning for complex ASIC/SoC designs while ensuring optimal timing, congestion, and power distribution.
  • Collaborate with RTL design engineers to provide actionable feedback that improves RTL quality, synthesis results, and overall implementation.
  • Analyze netlists and identify opportunities to improve design quality and implementation efficiency.
  • Work cross-functionally with architecture, RTL, verification, and physical design teams to ensure smooth design convergence.
  • Support timing closure by identifying implementation bottlenecks and recommending design improvements.
  • Participate in design reviews and contribute to continuous process and methodology improvements.
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