Senior CPU Performance Architect

Google•Mountain View, CA

23h•$163,000 - $236,000

About The Position

Join a team developing custom silicon solutions for Google's direct-to-consumer products. The role contributes to the development of next-generation hardware experiences, focusing on performance, efficiency, and integration. Google's team combines AI, software, and hardware expertise to research, design, and develop technologies that make computing faster, seamless, and more powerful.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience with CPU microprocessor architecture or CPU microarchitecture.
Experience in performance modeling, performance analysis, and workload characterization.
Experience in software performance analysis and improvement, and high-performance computer architectures such as CPU, memory subsystem, and multiprocessing.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on Computer Architecture, or a related field.
Experience leading CPU microarchitecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
Experience with one or more CPU microarchitectural blocks, such as caches or branch predictors.
Knowledge of processor instruction set architectures, such as ARM, RISC-V, or x86.
Knowledge of system software components, such as Linux, drivers, and runtime.

Responsibilities

Define and write CPU subsystem architecture specifications.
Develop accurate models for performance analysis and microarchitecture study.
Plan and evaluate ARM architecture features from architecture and performance perspectives.
Deliver solutions to complex CPU performance, microarchitecture design, tool infrastructure, and methodology problems, including ambiguous problems or those without clear precedent.
Collaborate with RTL, Design Verification, and Physical Design teams to develop a high-performance and efficient CPU implementation.