Senior ASIC Verification Engineer
NVIDIA•Austin, WA
•$136,000 - $264,500•Hybrid
About The Position
The NVIDIA Clocks Team develops clocking and reset logic for units in SoC and GPU ASICs. As clocking and reset designs grow more complex, this role will develop and apply sophisticated verification solutions that deliver high-quality clock designs across NVIDIA product lines, including data centers, consumer graphics, self-driving cars, and artificial intelligence. Verification approaches should cover complex specifications while balancing infrastructure constraints, reusability, test speed, and multi-platform support.
Requirements
- BS or MS in EE/ECE, or equivalent experience.
- At least 5 years of relevant industry work experience.
- Good understanding of logic design and architecture.
- Expertise in industry-standard verification flows, such as SystemVerilog constraint-random verification, UVM, formal verification, coverage metrics, profiling tools, and X-prop.
- Exposure to block-level and system-level verification.
- Strong coding skills in SystemVerilog, scripting languages such as Perl and Python, and C++.
- Ability to collaborate and work with multiple groups.
- Prior experience implementing test plans for pre-silicon platforms.
Nice To Haves
- Understanding of DFT/IST.
- Previous experience automating tasks in the design verification process.
- Hands-on experience in object-oriented programming.
- Prior design or verification experience at the IP or block level.
- Experience developing methodologies used by others.
- Demonstrated ability to drive a project to completion.
Responsibilities
- Own validation of clocking structures in Tegra and GPU products from start to finish, including test-plan development, automation, validation-flow development, coverage metrics, test execution, bug identification and fixing, and productization.
- Solve sophisticated problems and develop scalable solutions that work across platforms.
- Use industry-standard tools and modern verification methodologies, including SystemVerilog, UVM, C++, Perl, Python, and NVIDIA custom compilers and tools.
- Partner closely with clocks architecture and design teams to validate clock designs.
- Coordinate with internal and external teams across time zones.
Benefits
- Equity
- Benefits
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What This Job Offers
Job Type
Full-time
Career Level
Senior
