Senior ASIC Verification Engineer
NVIDIA•Santa Clara, CA
•$136,000 - $264,500
About The Position
NVIDIA is seeking Senior Verification Engineers to verify its SoCs and GPUs. The role is part of a collaborative team working across micro-architecture, design, verification, implementation, and post-silicon validation of automotive and gaming console chips, with a focus on backbone IPs for ARM-based systems-on-chip. The position contributes to products spanning consumer graphics, autonomous vehicles, and artificial intelligence.
Requirements
- Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
- At least 5 years of experience in ASIC verification-related fields at both IP and SoC levels.
- Experience building UVM testbenches from scratch and applying constrained-random methodology in a production environment.
- High proficiency in C/C++, including developing architectural golden models and hardware-software co-verification tests.
- Domain knowledge of low-speed IOs (QSPI, UART, I2C), high-speed IOs (Ethernet), AXI/APB interconnects, DMA controllers, and memory controllers.
- Expertise in assertion-based design checks (SVA), code coverage, functional coverage, and formal test-plan documentation.
- Strong debugging and analytical skills for resolving complex SoC-level corner cases.
- Professional-grade scripting abilities in Python, Perl, or TCL for automating build flows and regressions.
Nice To Haves
- A master’s or PhD degree.
- Advanced UVM architecture knowledge and large-scale SoC verification experience.
- Demonstrated ability to use AI tools to accelerate engineering tasks.
- Experience with testbench build flows, Makefiles, and Perforce version control.
- Ambition, high motivation, and a collaborative approach in a fast-paced environment.
Responsibilities
- Verify ASIC design and implementation to help ensure first-pass silicon success.
- Lead verification of ASIC designs, architecture, golden models, and micro-architecture using methodologies such as UVM.
- Understand designs, define verification scope, and develop infrastructure to verify complex logic.
- Collaborate with architects, designers, and pre- and post-silicon verification teams to achieve comprehensive coverage.
- Apply AI- and LLM-driven workflows to improve testbench generation, debugging productivity, and coverage closure.
Benefits
- Equity
- Benefits
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What This Job Offers
Job Type
Full-time
Career Level
Senior
