RTL IC Design Engineer

Broadcom•Colorado Springs, CO
•$101,000 - $162,000•Onsite

About The Position

Broadcom is seeking a Digital IC Design Engineer to join its Data Center Solutions Group. The position supports next-generation AI/ML ecosystems through PCIe Switch Products and enterprise storage products for large data centers. It involves in-depth implementation and support of RTL designs using Verilog/SystemVerilog, from architecture analysis through timing closure and silicon validation. The role must be performed in person; remote work is not allowed. The minimum qualifications are a bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or an equivalent engineering discipline, and at least five years of relevant industry experience. The annual base salary range is USD 101,000 to USD 162,000. Eligible compensation also includes a discretionary annual bonus and opportunities for new-hire and annual equity awards, subject to applicable plan documents and award agreements. Broadcom offers medical, dental, and vision plans; 401(k) participation with company matching; an Employee Stock Purchase Program; an Employee Assistance Program; company-paid holidays; paid sick leave and vacation time; and leave benefits as required by applicable law. Broadcom is an equal opportunity employer and considers qualified applicants without regard to protected characteristics, and applicants with arrest or conviction records where consistent with local law.

Requirements

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or an equivalent engineering degree.
  • At least five years of relevant industry experience.
  • In-depth knowledge of RTL design implementation and support using Verilog/SystemVerilog.

Nice To Haves

  • PCIe protocol knowledge.
  • CXL protocol knowledge.
  • AMBA protocol knowledge.
  • RAID storage design experience.
  • PCIe switch design experience.

Responsibilities

  • Analyze high-level architecture specifications through interactive authoring and review.
  • Develop and document micro-architecture.
  • Implement high-quality, high-performance Verilog/SystemVerilog RTL based on design specifications, potentially including asynchronous clock-domain crossings, multiple power domains, low-power design, complex algorithms, deep computations and pipelining, multithreaded designs, and third-party IP integration.
  • Converge designs to timing closure through RTL optimization strategies.
  • Debug RTL and develop robust RTL solutions.
  • Work with Verification, Software/Firmware, Emulation, and Validation Engineering teams to support issues involving the RTL design.
  • Provide lab support for silicon as it progresses through validation.

Benefits

  • Discretionary annual bonus.
  • Competitive new-hire equity grant and opportunity to receive annual equity awards, subject to applicable plan documents and award agreements.
  • Medical, dental, and vision plans.
  • 401(k) participation with company matching.
  • Employee Stock Purchase Program (ESPP).
  • Employee Assistance Program (EAP).
  • Company-paid holidays.
  • Paid sick leave and vacation time.
  • Paid Family Leave and other leaves of absence in accordance with applicable laws.
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