Principal Hardware SI/PI Architect

SiTime Corporation•Santa Clara, CA
•$148,320 - $203,840

About The Position

The Principal Hardware Signal Integrity/Power Integrity Architect is accountable for system-level electrical design and for establishing signal and power integrity simulation methodologies used to develop hardware platforms for validation, testing, and high-volume production of MEMS timing products. The role uses advanced signal integrity and PCB design expertise to deliver solutions that support optimal system performance, in collaboration with cross-functional teams. It also supports product quality and reliability through comprehensive testing processes. The position leads SI design initiatives and establishes SI/PI methodologies across hardware platforms, including validation environments, probing stations, load boards, and production test systems. It evaluates new technologies and techniques, delivers cost-effective solutions through analysis, simulation, experimental design, and verification, and collaborates with circuit design, packaging, board design, and product teams on system components and architectures. The role also performs root-cause analysis and resolution to help deliver high-quality, first-pass-success hardware infrastructure. SiTime describes itself as a precision timing company whose MEMS-based programmable timing solutions are used across applications including AI datacenters, automated driving, industrial and humanoid robots, wearables, and IoT. The role offers a quarterly bonus tied to innovation goals and equity grants. The stated pay range is $148,320–$203,840 USD.

Requirements

  • Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Over 10 years of expertise in hardware system design, including comprehensive signal integrity analysis and optimization.
  • Proficiency with PCB design tools such as Altium, Allegro, and APD, and ability to conduct thorough PCB reviews.
  • In-depth knowledge of server technologies, including signal and power integrity design and optimization, thermal management, and mechanical considerations for PCB and system design.
  • Experience designing high-speed interfaces such as DDR, PCIe, and USB.
  • Strong background in transmission line and electromagnetic field theory, including time- and frequency-domain analysis.
  • Ability to extract S-parameters or lumped models from packages and PCBs, convert them to Spice or behavioral circuit models, and evaluate performance through simulation.
  • Experience with MIPI, I2C, SPI, and UART interfaces.
  • Proficiency in impedance-controlled board design and manufacturing.
  • Ability to conduct laboratory measurements using an oscilloscope, phase noise analyzer, VNA, and TDR.
  • Demonstrates self-motivation and commitment to achieving meaningful results.
  • Ability and enthusiasm to contribute effectively in a collaborative, fast-paced team environment.
  • Exceptional communication, interpersonal, critical-thinking, and problem-solving abilities.
  • Ability to perform effectively under pressure and meet stringent deadlines.
  • Willingness and ability to take a hands-on approach, engage with technical details, resolve issues, and guide the team.

Nice To Haves

  • Leadership experience is a plus.

Responsibilities

  • Lead signal integrity design initiatives for system platforms supporting SiTime timing products across business units and applications.
  • Establish signal and power integrity methodologies across hardware platforms, including validation environments, probing stations, load boards, and production test systems.
  • Identify, assess, and integrate technologies, components, and techniques to improve signal and power integrity performance.
  • Conduct analysis, simulations, experimental design, and verification to deliver robust, cost-effective signal integrity solutions.
  • Collaborate with circuit design, packaging, board design, and product teams to define reliable components and architectures at the package, socket, connector, and board levels.
  • Perform root-cause analysis and resolve signal and power integrity challenges to support high-quality, first-pass-success hardware infrastructure.
  • Support product quality and reliability through comprehensive testing processes.

Benefits

  • 401(k) plan
  • Medical insurance
  • Dental insurance
  • Vision insurance
  • Life insurance
  • Parental leave
  • Legal services
  • Time-off plans
  • Quarterly bonus tied to achievement of innovation goals
  • Equity grants
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