Principal Engineer-Yield Enhancement

Microchip•Colorado Springs, CO

About The Position

The Principal Engineer is a semiconductor wafer-fab device engineer responsible for product and technology yield. The role investigates low yields at parametric and wafer-sort test, introduces new products into production, supports product and process transfers, and continuously improves product yield and reliability. The position works with wafer-fab process, product, design, and test engineering teams to analyze production and engineering data, conduct experiments, evaluate process impacts, perform failure analysis, and resolve product or fabrication issues. It also owns product and technology yield limits, process change control, new product introduction, and yield improvement activities. The position is listed for the first shift. Travel is estimated at 0%–25%.

Requirements

  • Bachelor’s degree in Electrical Engineering, Chemical Engineering, Materials Science, Physics, Microelectronics, or a related field.
  • At least 10 years of relevant experience in semiconductor yield analysis and enhancement, defect and excursion reduction, process and product correlation, data analytics, root-cause investigation, corrective action, production learning, and continuous improvement.
  • Knowledge of basic semiconductor device physics and electronics, including transistor characteristics.
  • Understanding of basic digital and analog circuits, their components, and how they are characterized.
  • Overall knowledge of integrated-circuit wafer-fab manufacturing processes.
  • Familiarity with test equipment such as semiconductor parameter analyzers, power supplies, multimeters, generators, oscilloscopes, and curve tracers.
  • Knowledge of basic statistical functions and statistical process control (SPC), including normal distributions, Cpk, analysis of variance, and correlation techniques.
  • Ability to present information effectively to management and employees, both orally and in writing.
  • Understanding of mathematical concepts including probability, geometry, algebra, trigonometry, and calculus.
  • Ability to solve problems effectively and help drive improvement activities.
  • Ability to define problems or issues, collect data, establish facts, and draw valid conclusions.

Nice To Haves

  • Master’s degree or PhD in Electrical Engineering, Physics, Microelectronics, or a related field.
  • Relevant professional certification where job-related and approved.

Responsibilities

  • Work with wafer-fab process engineering, product engineering, design engineering, and test engineering to understand issues and opportunities and drive yield improvement activities.
  • Analyze production and engineering data to identify and resolve product yield issues.
  • Design, coordinate, and analyze IC manufacturing process experiments to improve product yields and performance.
  • Evaluate the parametric and product impact of process experiments.
  • Use evaluation equipment, including manual probe stations, parametric evaluation equipment, bit mappers, and microscopes, to collect engineering data, perform failure analysis, and detect circuit or fabrication problems causing failures.
  • Disposition maverick material at parametric test and wafer sort.
  • Own product and technology responsibilities, including maintenance of yield limits, process change control, new product introduction, and yield improvements.
  • Support introduction of new products and process flows into the fab and parametric test area by creating, reviewing, and implementing supporting specifications and process routes and flows.
  • Support transfers from other facilities when needed.
  • Plan and complete technical projects.
  • Communicate regularly with management and other functional groups to ensure understanding of needs and problems related to the Yield Engineering function.

Benefits

  • Competitive base pay, restricted stock units, and quarterly bonus payments.
  • Health benefits beginning on day one.
  • Retirement savings plans.
  • Employee stock purchase plan (ESPP) with a two-year look-back feature.
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