Pre-Silicon Digital Verification Engineer

Apple • Sunnyvale, CA

2d

About The Position

Apple is seeking a pre-silicon digital verification engineer to verify complex digital IPs for mixed-signal integrated circuits. The engineer will work on custom integrated circuits for Apple’s existing and future product lines as part of a mixed-signal ASIC team, collaborating with system architects and digital designers to clarify block-level specifications and build verification plans for functional, performance, stress, and error cases.

The role owns creation of verification testbenches using formal verification and UVM-based simulation, and development of SystemVerilog Assertions and constrained-random UVM test cases to achieve functional and code coverage. The engineer will debug test failures, work with designers on fixes, review other blocks, and use coverage to track progress and assess tapeout readiness. The role also offers opportunities to learn and apply formal verification, digital mixed-signal verification, and analog mixed-signal simulation using state-of-the-art tools. The team is described as close-knit and high-performing, and offers mentorship in mixed-signal ASIC development.

Requirements

• Bachelor of Science degree.
• A minimum of 3 years of relevant industry experience.
• Extensive coursework in digital design and computer architecture.
• Foundation in object-oriented programming techniques.
• Lab courses or work experience with SystemVerilog.
• Familiarity with constrained-random verification techniques.
• Familiarity with clock-domain crossing design and verification techniques.
• Some coursework in analog circuit design.

Responsibilities

• Collaborate in developing precise design specifications for digital control blocks.
• Use design specifications to create block- and chip-level verification plans.
• Architect and create block-level verification elements.
• Assist in architecting chip- and system-level verification environments.
• Use SystemVerilog and UVM to develop drivers, tests, reference models, and checkers.
• Debug test failures and work with designers to develop fixes.
• Use functional and code coverage to track progress and gauge tapeout readiness.
• Participate in code reviews of other chip blocks and propose ways to improve verification.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level