Principal Silicon Design Verification Engineer

Microsoft • Redmond, WA

1d • $142,800 - $304,200

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) develops infrastructure and foundational technologies for Microsoft’s online businesses and Azure platform. The Principal Engineer - ASIC Verification will work on the Data Processing Unit team, validating silicon to solve complex datacenter problems and collaborating with architecture teams on programmable silicon implementations. The role is highly visible and impactful, with opportunities to work across the broad technical domains involved in DPU silicon development.

The engineer will lead functional validation of complex ASIC SoCs, perform pre-silicon verification and post-silicon validation, and develop test plans, tests, and infrastructure. The role involves coordinating with architecture, design, verification, and partner teams; debugging test failures; supporting chip bring-up; improving validation methodologies and tools; and mentoring others.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3+ years of technical engineering experience; or a master's degree in one of these fields and 6+ years of technical engineering experience; or a bachelor's degree in one of these fields and 8+ years of technical engineering experience; or equivalent experience.
• Ability to meet Microsoft, customer, and/or government security screening requirements, including the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
• Ability to meet export-control eligibility requirements, including providing proof of citizenship, U.S. residency, or other protected status; citizenship will be verified with a valid passport, with applicable alternative documentation for lawful permanent residents, refugees, and asylees.

Nice To Haves

• 10+ years of pre-silicon validation experience, with a record of delivering high-performance network switches or accelerators, CPUs, vector processors, GPUs, or relevant systems.
• Experience with UVM/C verification methodology.
• Knowledge of Ethernet, TCP/IP, RoCEv2, MAC/PCS, and networking NICs or switches.
• Track record defining and developing complex SoCs, with in-depth understanding of processors and peripheral interconnect bus protocols and architectures.
• Proficiency in Verilog, SystemVerilog, and UVM-based testbench environments.
• Experience building UVM testbenches, managing regressions, meeting code-coverage and functional-coverage goals, and achieving successful tapeout.

Responsibilities

• Lead key components of functional validation for complex ASIC SoCs using UVM/C test benches.
• Perform pre-silicon SoC verification and post-silicon validation by defining testing strategies.
• Work with architecture, design, verification, and partner teams to execute projects and influence next-generation designs.
• Develop test plans, C tests, and infrastructure for functional validation of complex designs; report bugs and issues.
• Run tests, debug failures, and create stress and performance scenarios to meet test-plan goals.
• Participate in chip bring-up and write test firmware to support various teams.
• Improve validation efficiency through methodologies and tools.
• Coach and mentor others in areas of expertise.
• Demonstrate Microsoft core values, including customer focus, adaptability, collaboration, growth mindset, drive for results, influence for impact, judgment, and diversity and inclusion.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal