Physical Verification & Signoff Engineer

Voltai • Palo Alto, CA

5d

About The Position

Voltai is developing world models and agents that learn, evaluate, plan, experiment, and interact with the physical world, starting with hardware, electronics systems, and semiconductors. The Physical Verification & Signoff Engineer will own physical verification and reliability signoff on silicon programs with leading semiconductor companies, serving as the last line of defense before tapeout. The role also contributes to training Voltai’s AI to identify and resolve signoff issues.

Requirements

• At least 5 years of physical verification or signoff experience on production tapeouts.
• Deep experience with Calibre or IC Validator.
• Experience with RedHawk or Voltus for IR/EM analysis.
• Strong understanding of foundry rule decks at advanced nodes.
• Tcl, Python, or SVRF scripting.

Nice To Haves

• Experience with 2.5D/3D packaging or chiplet integration signoff.
• Direct foundry interface experience.
• Interest in AI-assisted design tools.

Responsibilities

• Own DRC, LVS, ERC, and antenna signoff at block and full-chip level.
• Run and sign off IR drop, electromigration, and power integrity analysis.
• Debug signoff violations and drive fixes with physical design teams.
• Manage tapeout checklists and foundry deliverables.
• Build automation for signoff runs, triage, and reporting.
• Help define how AI can triage and fix signoff violations.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed