Principal Physical Verification Engineer

Celero Communications • San Jose, CA

2d

About The Position

The Principal Physical Verification Engineer leads full-chip physical verification efforts, owning verification execution plans and schedules and driving quality, milestone accountability, and tapeout readiness. The role conducts full-chip and block-level physical verification checks and oversees verification ownership across the chip.

The engineer works with the internal analog team to support clean IP delivery and runs and analyzes DRC, ERC, LUP, and PERC results using ICV or Calibre. The role also partners with analog, block, and chip-top owners on floorplanning, provides early guidance on corner-case requirements, influences floorplan constraints, hierarchy, and implementation strategy, and participates in tapeout-readiness reviews.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering or a related field.
• At least 7 years of experience with full-chip verification.
• Hands-on experience with physical verification tools such as ICV or Calibre.
• Ability to assemble a flow supporting block- or chip-level physical verification.
• Strong expertise in floorplanning to avoid DRC/LVS issues.
• Ability to guide the analog IP team toward clean integration.
• Understanding of advanced TSMC DRC rules.

Nice To Haves

• Experience with advanced technology nodes such as 7nm, 5nm, or 3nm.
• Automation skills using Tcl, Python, or shell scripting.

Responsibilities

• Lead full-chip physical verification efforts.
• Own execution plans and schedules for full-chip verification.
• Drive accountability for quality, milestones, and tapeout readiness.
• Conduct full-chip and block-level physical verification checks.
• Own full-chip verification.
• Work with the internal analog team to ensure clean IP delivery.
• Run and analyze DRC, ERC, LUP, and PERC results.
• Partner with analog, block, and chip-top owners to support clean floorplanning.
• Provide early guidance on corner-case requirements.
• Influence floorplan constraints, hierarchy, and implementation strategy.
• Participate in tapeout-readiness reviews.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal