Packaging Architect

OLIX•London, Texas

13d

About The Position

OLIX is developing the DX-1, an accelerator architected specifically for decode, using rack-scale co-design of logic, data movement, packaging, optics, and interconnect. Packaging is a core element of OLIX’s system-level performance and product differentiation. The Packaging Architect will own packaging technology direction across current and future products. The role leads packaging for DX-1 from architecture through design, analysis, layout, verification, release, and manufacturing support, while defining the technology strategy, roadmap, partner ecosystem, and internal capabilities needed for future products. Those products may use denser multi-die and chiplet-style integration, 2.5D and 3D architectures, and more advanced optical integration. As the programme grows, the role may build and lead a packaging team while remaining a hands-on technical contributor.

Requirements

10+ years of experience in advanced semiconductor packaging for ASICs or other high-performance products.
Demonstrated ownership of packaging architecture, technology strategy, or roadmap development for complex products.
Deep expertise in front-end package design, including ASIC-to-substrate integration.
Strong experience with 2.5D and/or 3D package architectures, including multi-die and heterogeneous integration.
Hands-on capability with package design tools such as Cadence Allegro X APD, Siemens Xpedition, or equivalent.
Experience leading package development across layout, simulation, verification, and release.
Strong PI/SI simulation capability, including package-level signal integrity and power delivery analysis using tools such as Ansys SIwave, Cadence Sigrity, or equivalent.
Experience in substrate design and package-to-board integration.
Experience building packaging capability, processes, or teams, or leading engineers while remaining a hands-on contributor.
Strong working relationships with substrate vendors, OSATs, and foundry packaging organisations.
Good understanding of manufacturability, interconnect technologies, and package reliability.
Strong technical judgement, communication, and problem-solving skills.
Degree in a relevant engineering or physical sciences discipline.

Nice To Haves

Experience with AI accelerators, high-performance computing, networking, or advanced data-centre hardware.
Familiarity with wafer-level packaging and emerging advanced packaging platforms.
Exposure to optical or photonic integration with electronic packaging.
Familiarity with package reliability, qualification, and failure analysis workflows.
Exposure to new product introduction and scaling advanced package technologies into production.

Responsibilities

Own package architecture and design for ASIC-to-substrate integration, including bump/pad mapping, substrate escape, interconnect strategy, package floorplanning, and stack-up definition.
Lead development of 2.5D and 3D package architectures for future products, including multi-die integration, chiplet-style interfaces, and heterogeneous integration.
Define package structures that meet electrical, thermal, mechanical, reliability, and manufacturability requirements.
Translate silicon and system requirements into package design rules, routing constraints, and implementation strategies.
Own or direct the package design flow from concept through detailed design, analysis, layout, verification, release, and manufacturing support.
Develop and review package layouts, including die placement, substrate routing, power/ground distribution, high-speed interface breakout, and physical integration constraints.
Own or direct PI/SI simulations to validate signal integrity, power delivery, and package performance, and use results to guide design improvements and sign-off decisions.
Support package-to-board co-design, including substrate and PCB layout/interface definition where required.
Align die, package, substrate, and board-level implementation.
Oversee package database management, design reviews, sign-off, and release readiness.
Establish packaging engineering methodologies, design libraries, templates, rules, tool flows, and workflows for repeatable development across product generations.
Define the packaging function’s hiring roadmap and build and lead a team as the programme scales, while remaining a hands-on technical contributor.
Mentor engineers in adjacent disciplines on packaging-aware design practices.
Support tool-flow development and integration across package, substrate, simulation, and PCB environments.
Work with ASIC, optics, mechanical, thermal, and systems engineers to optimise package performance and system integration.
Collaborate with substrate vendors, OSATs, foundries, and other external partners on stack-ups, design rules, feasibility, and manufacturing readiness.
Ensure package decisions support manufacturability, reliability, serviceability, and scale, and serve as the key interface between package design and adjacent engineering domains.
Align package designs with assembly, qualification, reliability, and manufacturing requirements.
Lead DFM/DFX activities for advanced package technologies and substrate implementations.
Support prototype build, bring-up, qualification, and early production, taking technical ownership of packaging-related issues.
Participate in root-cause analysis and corrective action for packaging or integration issues identified during build, test, or reliability assessment.
Review substrate deliverables, fabrication outputs, and manufacturing documentation for completeness and technical quality.