NPU RTL Design Engineer

Qualcomm • San Diego, CA

7d • $133,900 - $200,900

About The Position

The NPU RTL Design Engineer works on high-performance, low-power Hexagon/NPU cores used in Qualcomm’s mobile SoC, server, IoT, and automotive roadmaps. The role requires an in-depth understanding of the ASIC design flow from RTL to GDS2 and of challenges associated with advanced technologies. It involves RTL design, synthesis, static timing analysis, PLDRC, clock-domain crossing, and low-power techniques. Knowledge of microprocessor design and integration is an advantage.

The engineer collaborates with system architecture, physical design, verification, and hardware integration teams to develop and integrate Hexagon/NPU blocks and subsystems. The role also contributes ideas to advance ASICs, IP cores, and process flows.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field and 2+ years of relevant work experience; or a master’s degree in one of these fields and 1+ year of relevant work experience; or a PhD in one of these fields.
• 2+ years of experience with high-performance microprocessor design.
• Minimum qualifications also list a bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field and 2+ years of Electrical Engineering or related work experience; or a master’s degree in Electrical Engineering or Computer Engineering, or a related field, and 1+ year of Electrical Engineering or related work experience.

Nice To Haves

• Master’s degree in Computer Engineering or Electrical Engineering.
• 2+ years of practical RTL development experience, including functional and structural RTL design in SystemVerilog, design partitioning, simulation and regression, and collaboration with a design verification team.
• Familiarity with current design tools such as linting, CDC, LEC, and CLP.
• Experience with processor integration, bus interfaces, or computer architecture.
• Knowledge and experience of microprocessor design and integration.

Responsibilities

• Work with the system architecture team to define microarchitecture documentation for Hexagon/NPU blocks and subsystems.
• Develop RTL for multiple Hexagon/NPU logic blocks and subsystems for SoC integration.
• Run frontend tools to check linting, clock-domain crossing, power intent, and related design concerns.
• Work with the physical design team on design constraints and timing closure.
• Optimize area and power.
• Collaborate with the verification team on test plans, test debugging, coverage plans, and coverage closure.
• Support internal hardware integration.
• Provide ideas and contribute to innovation in ASICs, IP cores, and process flows.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants; employees on sales-incentive plans are not eligible for the annual bonus.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level