MTS Mask Design Engineer

Advanced Micro Devices, Inc•Santa Clara, CA

7h•Remote

About The Position

AMD, Inc. is hiring an MTS Mask Design Engineer to research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing. The role verifies mask designs against leading-edge physical and electrical checks and guidelines, and oversees designs for complex macros and tiles integrated at the system-on-chip (SOC) level. The engineer applies knowledge of DRC/LVS debugging, EM/IR, density concerns, and design-flow processes, and drives projects or processes of significant technical importance. The position requires independent judgment in selecting methods, techniques, and evaluation criteria, as well as applying knowledge of electronics, design tools and techniques, engineering principles, best practices, and technologies to the design, development, and testing of proprietary products. The work can be performed remotely. Travel is not required. Multiple openings are available.

Requirements

Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field, plus three years of experience in the job offered or a closely related engineering role; alternatively, a bachelor’s degree or foreign equivalent in one of those fields plus five years of progressive post-baccalaureate experience in the job offered or a closely related engineering role.
Three years of experience in IC Mask Layout Design.
Three years of experience in Analog and RF/High-Speed design.
Three years of experience in the Cadence Design environment.
Three years of experience with Virtuoso XL/EXL/MXL and Calibre verification tools.
Three years of experience performing layout-versus-schematic (LVS) and design rule checks (DRC).
Three years of experience with advanced layout techniques, including nodes at 16nm and below.
Three years of experience with top-level and block-level floorplanning.
Three years of experience with design rules, minimization of parasitic effects, IR drop, and isolation techniques.

Responsibilities

Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing.
Verify mask designs against physical and electrical checks and guidelines.
Oversee mask designs for complex macros and tiles to be integrated at the SOC level.
Contribute to design-flow activities, including DRC/LVS debugging and addressing EM/IR and density concerns.
Drive projects or processes of significant technical importance.
Select methods, techniques, and evaluation criteria independently to obtain results.
Apply engineering principles, best practices, technologies, and knowledge of design tools to design, develop, and test proprietary products.