Low Power Design Methodology and Optimization Engineer

Google•Austin, TX

5d•$192,000 - $278,000

About The Position

Be part of a team developing custom silicon solutions that power Google's direct-to-consumer products. The team combines Google AI, Software, and Hardware to research, design, and develop technologies and hardware that make computing faster, seamless, and more powerful. In this role, you will develop and implement advanced low-power design methodologies for CPU architectures, analyze and optimize power across design stages, collaborate with design and implementation teams, and help define and validate power management specifications.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience in CPU low-power design and optimization.
Experience with low-power design, including dynamic and leakage power, power estimation and optimization, data analytics, and profiling.
Experience in flow automation using Python, C, or C++.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience in RTL design and low-power design techniques.
Experience with power management and DVFS.
Experience with CPU benchmarking, performance analysis, and industry study.
Experience with vendor tools such as PTPX, Ansys Power Artist, and Synopsys Prime Power RTL.
Knowledge of CPU microarchitecture.

Responsibilities

Develop and implement advanced low-power design methodologies for CPU architectures.
Perform detailed power analysis, estimation, and optimization across various design stages.
Collaborate with RTL design, verification, and physical design teams to integrate power-saving features.
Drive the adoption of innovative power reduction techniques and tools.
Contribute to the definition and validation of power management specifications.