Low Power Design Engineer

Apple•San Diego, CA

About The Position

Join Apple’s wireless silicon development team, which develops wireless silicon with a focus on energy-efficient, low-power design and technologies that transform the product user experience. In this role, you will design power management logic for complex wireless communication SoCs and contribute to low-power logic design efforts that support delivery of functional products to customers.

Requirements

  • Bachelor’s degree.
  • Proven track record in power, clock, and reset management logic design.
  • Proficiency in Verilog.
  • Experience with power management logic verification and debug.
  • Understanding of ASIC low-power design techniques.
  • Knowledge of CDC, RDC, STA, and UPF.
  • Proficiency in scripting languages such as Shell, Perl, or Python.
  • Knowledge and experience with common SoC components, such as CPUs, fabric, and peripherals.
  • Strong problem-solving and analytical skills.

Nice To Haves

  • SoC-level power management logic experience.
  • SoC top-level integration experience.
  • System architecture knowledge.
  • Post-silicon functional debug and power correlation experience.

Responsibilities

  • Design power management logic for complex wireless communication SoCs.
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