Low Power Design Engineer

Apple • San Diego, CA

1d

About The Position

Apple’s wireless silicon development team develops wireless silicon, emphasizing energy-efficient, low-power design and technologies that transform product-level user experiences. In this role on the wireless SoC organization, you will design power management logic for complex wireless communication SoCs and contribute to low-power logic design efforts that help deliver functional products to customers.

Requirements

• Bachelor of Science degree and a minimum of 10 years of relevant industry experience.
• Proven track record in power, clock, and reset management logic design.
• Proficiency in Verilog.
• Experience with power management logic verification and debug.
• Understanding of ASIC low-power design techniques.
• Knowledge of CDC, RDC, STA, and UPF.
• Proficiency in scripting languages such as Shell, Perl, or Python.
• Knowledge and experience with common SoC components, such as CPUs, fabric, and peripherals.
• Strong problem-solving and analytical skills.

Nice To Haves

• SoC-level power management logic experience.
• SoC top-level integration experience.
• System architecture knowledge.
• Post-silicon functional debug and power correlation experience.

Responsibilities

• Design power management logic for complex wireless communication SoCs.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior