CPU Low Power RTL Design Engineer

Qualcomm • Santa Clara, CA

2d • $124,300 - $186,500

About The Position

Qualcomm Technologies, Inc. is hiring an engineer to develop CPU RTL for high-performance, low-power devices. The role works with chip architects to develop microarchitecture and contribute to architecture and product definition through early involvement in the product life cycle.

The engineer may own or participate in power architecture development and specification, from early high-level architectural exploration through microarchitectural research and detailed specification. The role also involves developing, assessing, and refining UPF and RTL designs so that the RTL matches the power intent, and working with a multifunctional engineering team to implement and validate power-aware designs from RTL through physical implementation.

Requirements

• A master's degree in Computer Engineering or Electrical Engineering, or a bachelor's degree in Computer Engineering or Electrical Engineering with more than three years of RTL experience.
• Knowledge of Verilog and/or SystemVerilog.
• Experience with simulators and waveform-debugging tools.
• Knowledge of power intent and the UPF format.
• Experience using UPF and Conformal Low Power analysis.
• Knowledge of logic design principles and their timing and power implications.
• A bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

Nice To Haves

• Understanding of low-power microarchitecture techniques.
• Understanding of the physical implementation of RTL with power intent.
• Understanding of high-performance techniques and trade-offs in CPU microarchitecture.
• Experience using a scripting language such as Perl or Python.

Responsibilities

• Develop and specify power architecture, from high-level architectural exploration through microarchitectural research and detailed specification.
• Develop, assess, and refine UPF and RTL designs to match the power intent to the RTL design.
• Work with a multifunctional engineering team to implement and validate power-aware designs from RTL through physical implementation.
• Work with chip architects on microarchitecture and contribute to architecture and product definition.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants, except for employees on sales-incentive plans.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time