Low Power Design Engineer

Apple • Irvine, CA

1d

About The Position

Join Apple’s wireless silicon development team, which develops wireless silicon with a focus on energy-efficient, low-power design and technologies that improve product experiences. In this role, you will design power management logic for complex wireless communication SoCs and contribute to delivering functional products to customers. You will define and implement SoC power management features, collaborate with cross-functional teams to verify the logic, support power analysis and post-silicon correlation, and assist with post-silicon bring-up and debug.

Requirements

• Bachelor’s degree.
• Proven track record in power, clock, or reset management logic design.
• Proficiency in Verilog.
• Experience verifying and debugging power management logic.
• Understanding of ASIC low-power design techniques.
• Knowledge of CDC, RDC, STA, and UPF.
• Proficiency in scripting languages such as Shell, Perl, or Python.
• Knowledge of common SoC components, such as CPUs, fabrics, and peripherals.
• Strong problem-solving and analytical skills.

Nice To Haves

• SoC-level power management logic experience.
• SoC top-level integration experience.
• System architecture knowledge.
• Post-silicon functional debug and power correlation experience.

Responsibilities

• Define SoC power management features to meet product requirements.
• Implement power management logic.
• Work with cross-functional teams to verify power management logic.
• Support the Power team with power analysis and post-silicon correlation efforts.
• Provide post-silicon bring-up and debug support.

What This Job Offers

• Job Type: Full-time