Lead ASIC Verification Engineer

General Dynamics Mission Systems, Inc•San Jose, CA
•$173,032 - $190,000

About The Position

As a Lead ASIC Verification Engineer for the Bitttercloud II program at Idaho Scientific, a business segment within General Dynamics Mission Systems, you will support a cross-functional team designing and architecting embedded security technologies for U.S. defense systems. The work includes secure processors, anti-tamper architectures, cryptographic IP, and integrated firmware and software solutions intended to address cyber exploitation, physical attacks, reverse engineering, and supply-chain compromise, while meeting government cybersecurity and survivability requirements. The role leads verification at the block, subsystem, and full-chip levels. It covers planning and executing verification activities, building reusable SystemVerilog/UVM environments, maintaining requirements traceability, managing coverage and regressions, investigating failures, and communicating status and risks. The Lead also provides technical direction and mentoring, improves verification processes and automation, and may support vendor oversight and program planning. Approved AI-enabled tools may be used when they provide clear engineering value and protect sensitive information.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related Science, Engineering, or Mathematics field, plus at least 10 years of relevant experience; or a Master's degree plus at least 8 years of relevant experience.
  • Department of Defense Secret security clearance required at time of hire.
  • U.S. citizenship is required due to the nature of the work.
  • Strong knowledge of ASIC and SoC verification processes.
  • Strong proficiency in SystemVerilog, UVM, assertions, coverage, and regression testing.
  • Experience developing reusable testbench components and register models.
  • Strong understanding of RTL, digital logic, interfaces, clocks, and resets.
  • Ability to convert requirements into measurable verification objectives and tests.
  • Experience debugging simulations and determining root causes.
  • Experience with scripting languages such as Perl, Tcl, Bash, and Python.
  • Experience with ASIC simulation and debug tools such as VCS, Verdi, Questa, or equivalent.
  • Experience with Linux, version control, and automated regression environments.
  • Ability to communicate technical results clearly to varied audiences.
  • Ability to lead multiple activities while maintaining quality and schedule.
  • Strong technical judgment, mentoring, and problem-solving skills.

Nice To Haves

  • Experience with formal verification, CDC/RDC analysis, or low-power verification.
  • Experience with emulation, silicon bring-up, or post-silicon validation.
  • Experience verifying third-party IP and complex interfaces.
  • Experience working in an Agile development environment.
  • Experience with vendor oversight, proposals, estimates, or program controls.

Responsibilities

  • Lead ASIC verification at the block, subsystem, and full-chip levels.
  • Develop verification plans, schedules, coverage goals, and completion criteria.
  • Build reusable SystemVerilog/UVM test environments and verification components.
  • Maintain traceability from requirements through test results and defect closure.
  • Plan and execute simulation, regression, formal verification, and emulation activities.
  • Drive coverage and regression results toward predetermined completion goals.
  • Lead failure investigation, root-cause analysis, and corrective-action verification.
  • Verify third-party and custom IP for functional and integration compliance.
  • Provide feedback to design and architecture teams on issues that affect verification.
  • Identify verification risks and develop practical mitigation plans.
  • Present verification status, evidence, risks, and recommendations at technical reviews.
  • Produce clear and accurate verification plans, procedures, and reports.
  • Improve verification processes, automation, metrics, and reusable assets.
  • Provide technical direction and mentoring to verification engineers.
  • Support vendor oversight, proposals, estimates, and program planning as needed.
  • Use approved AI-enabled tools where they provide clear engineering value and protect sensitive information.

Benefits

  • Highly competitive benefits
  • Flexible work environment
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