Senior ASIC Verification Engineer

Cornelis Networks, Inc. • Austin, TX

4d • Remote

About The Position

Cornelis Networks is hiring a Senior ASIC Verification Engineer to help verify high-performance SoCs for HPC, high-performance data analytics, and AI interconnect solutions. As a hands-on technical member of the ASIC leadership team, this engineer will lead verification closure across projects, including design modules, subsystems, and SoCs. The role covers test planning, UVM-based testbench development, regression, and coverage closure, with collaboration across ASIC design, emulation, system hardware, software, and post-silicon teams to help achieve first-pass silicon success.

The position also provides technical leadership and day-to-day guidance to team members through mentoring, coaching, and counseling. The engineer will help educate the team in using AI tools to improve productivity and will establish and enforce coding and verification guidelines. The role is remote for employees residing within the United States.

Requirements

• At least 8 years of experience writing code using UVM/SystemVerilog.
• At least 8 years of experience verifying complex SoCs with multiple clock and reset domains using VCS or equivalent simulation tools.
• At least 8 years of experience debugging failures to the RTL line, closing out bug fixes, and using Verdi or equivalent debug tools.
• At least 8 years of experience with ground-up testbench development.
• At least 8 years of experience with revision control systems such as Git or SVN.
• Bachelor’s degree in Computer Engineering, Computer Science, or Electrical Engineering.

Nice To Haves

• Master’s degree in Computer Engineering, Computer Science, or Electrical Engineering.
• At least 8 years of relevant networking hardware verification experience.
• Expertise verifying 50G, 100G, or 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, or IPSec and their application in high-speed data processing and networking.
• Experience with one or more scripting languages such as TCL, Python, Perl, or shell scripting.
• Track record of first-pass success in ASIC and systems.
• Experience using AI tools to generate test plans and improve verification-process and team productivity.

Responsibilities

• Define the overall SoC-level verification strategy, technical planning, and direction.
• Enable and drive development of UVM environments to verify RTL at block, unit, and SoC levels.
• Develop and execute functional tests according to verification test plans.
• Instrument testbenches for functional and code coverage and drive coverage closure based on metrics.
• Collaborate with design, software, emulation, and silicon validation teams to ensure design quality.
• Provide day-to-day guidance and leadership to team members.
• Drive results through mentoring, coaching, and counseling.
• Educate the team on using AI tools to improve productivity and efficiency.
• Generate and enforce coding and verification guidelines.

Benefits

• Equity, cash, and incentives as part of a competitive compensation package.
• Health and retirement benefits.
• Medical, dental, and vision coverage.
• Disability and life insurance.
• Dependent care flexible spending account.
• Accidental injury insurance.
• Pet insurance.
• Paid holidays.
• 401(k) with company match.
• Open Time Off (OTO) for regular full-time exempt employees.
• Sick time.
• Bonding leave.
• Pregnancy disability leave.
• Flexible work environment.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior