High Bandwidth Memory Design Architect - E1 to SMTS

Micron Technology•Richardson, TX

About The Position

The Heterogeneous Integration Group’s HBM Architecture team develops next-generation High-Bandwidth Memory solutions for AI, high-performance computing, cloud infrastructure, and advanced networking systems. The team collaborates across architecture, design, verification, packaging, product engineering, and technology development to evaluate innovative memory architectures and deliver scalable, high-performance semiconductor solutions. As an HBM Design Architect, you will contribute to analysis, modeling, and pathfinding for future HBM products. Working with experienced architects and engineering teams, you will analyze system- and block-level design tradeoffs related to performance, power, area, thermal behavior, reliability, and manufacturability. The role also offers the opportunity to use AI, Large Language Models, and data-driven engineering methods to accelerate architecture exploration and improve decision-making.

Requirements

A degree in Electrical Engineering, Computer Engineering, or a related field, completed before the employment start date.
A strong foundation in at least two of the following areas: CMOS circuits, analog or mixed-signal design, semiconductor devices, computer architecture, memory systems, thermal sciences, signal integrity, power delivery, or advanced packaging.
Experience developing engineering models, simulations, or analytical methodologies through job experience or university-related work.
Ability to evaluate complex technical problems, draw evidence-based conclusions, and communicate recommendations effectively to multidisciplinary teams.
Strong analytical, problem-solving, written communication, and verbal communication skills.

Nice To Haves

Work experience, graduate research, internship, thesis, dissertation, or project experience related to HBM, DRAM, SRAM, memory controllers, high-speed interfaces, semiconductor architecture, or 3D integration technologies.
Experience with engineering simulation and analysis tools such as HSPICE, FineSim, Spectre, or similar circuit-design environments.
Understanding of power, performance, area, timing, thermal, and reliability tradeoffs in advanced semiconductor designs.
Experience using data analytics, AI, Large Language Models, or Generative AI to enhance engineering productivity, design exploration, or technical analysis.
Technical communication experience demonstrated through publications, conference presentations, patents, research reviews, or design reports.

Responsibilities

Analyze HBM and DRAM architectures using analytical models, simulations, silicon data, and AI-assisted techniques to evaluate timing, bandwidth, power, area, thermal performance, reliability, and design complexity.
Develop and apply modeling, simulation, and data-analysis methodologies to assess architectural alternatives, identify design sensitivities, and support technology pathfinding.
Collaborate with architecture, circuit design, layout, packaging, product, and system teams to evaluate implementation feasibility, performance tradeoffs, signal integrity, power delivery, and manufacturability.
Perform root-cause analysis using simulation and measured data to improve model accuracy, validate assumptions, and provide evidence-based design recommendations.
Communicate technical findings through presentations, design reviews, architecture discussions, and written documentation, clearly articulating assumptions, risks, and recommended actions.