Analog Design, Architect

Synopsys • Boxborough, MA

8d • $198,000 - $297,000 • Onsite

About The Position

Synopsys is hiring an Analog Design, Architect to help develop next-generation High Bandwidth Memory (HBM) PHY products. The role focuses on designing and validating analog and mixed-signal circuits for high-speed memory interfaces, defining PHY architecture, and ensuring circuit performance is maintained through physical implementation. The architect will drive silicon-to-simulation correlation for HBM PHY test chips and support customer silicon bring-up and debug, investigating signal integrity, power integrity, and functional issues. The role also includes collaborating with a global, cross-functional team and mentoring junior and mid-level analog designers. The position is based in Boxborough, Massachusetts and is not remote eligible.

Requirements

• MS or PhD in Electrical Engineering, focused on analog, mixed-signal, or RF circuit design.
• 12 or more years of hands-on experience designing analog and mixed-signal circuits for memory interfaces or high-speed die-to-die links.
• Proven track record debugging memory-interface silicon, including root cause analysis of signal integrity, power integrity, and functional failures.
• Deep understanding of how layout parasitics, substrate coupling, and power delivery affect circuit performance, with experience reviewing and guiding physical implementation.
• Strong grounding in signal integrity and power integrity, including transmission-line effects, termination schemes, crosstalk, and simultaneous switching noise.
• Experience defining or contributing to PHY architecture and making power, performance, area, and complexity tradeoffs that meet real customer requirements.

Nice To Haves

• Scripting experience in Python, Perl, or similar for design automation, analysis, or post-processing.
• Experience exploring AI-assisted design flows.

Responsibilities

• Drive silicon-to-simulation correlation for HBM PHY test chips, identify root causes of divergence, and feed findings into design methodology.
• Support customer silicon bring-up and debug, diagnosing signal integrity, power integrity, and functional issues.
• Define architecture for next-generation HBM PHY products and make power, performance, and area tradeoffs.
• Design and validate analog and mixed-signal circuit blocks for high-speed memory interfaces, including PLLs, DLLs, drivers, receivers, and voltage regulators.
• Collaborate with layout engineers and guide reviews of floorplan, routing, and parasitic extraction to preserve circuit performance through physical implementation.
• Work with digital designers, verification engineers, and product architects across multiple sites to deliver integrated PHY IP.
• Mentor mid-level and junior analog designers through schematic reviews, debug guidance, and knowledge sharing.

Benefits

• Comprehensive health, wellness, and financial benefits.
• The role may be eligible for an annual bonus, equity, and other discretionary bonuses.
• Competitive total rewards package.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior