Hardware Engineer II - Design Verification

HPR • Needham, MA

7d • Onsite

About The Position

HPR is a provider of high-performance and ultra-low-latency electronic trading and capital markets infrastructure solutions offered as a managed service. Its technology is used by tier-1 financial institutions to monitor and execute trades. The Hardware Engineer II – Design Verification will verify and maintain FPGA compute and networking systems used in electronic trading and contribute throughout the verification process, from specification and test planning through testbench development, execution, and coverage closure. The role partners with design engineers to develop, review, and execute test plans; creates reusable SystemVerilog verification components and testbenches; uses simulation and debugging tools to identify and resolve design issues; and helps improve verification processes, tools, and methodologies.

The position is full-time and on-site at HPR’s Needham, Massachusetts office five days per week. HPR does not currently provide employment sponsorship. The anticipated annual base salary range is $90,000 to $216,000. Final compensation may vary based on experience, skills, and qualifications; the stated range excludes potential bonuses, equity, and benefits.

Requirements

• Bachelor’s or master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
• At least 2 years of experience in design verification for FPGAs or ASICs.
• Proficiency in SystemVerilog for verification.
• Familiarity with verification methodologies, including constrained randomization, functional coverage, and assertion-based checking.
• Experience with simulation and debugging tools such as VCS and Verdi.
• Comfort working in a Linux environment.
• Strong problem-solving, debugging, and communication skills.

Nice To Haves

• Experience developing and debugging UVM-based verification environments and SystemVerilog testbenches.
• Understanding of computer architecture and digital design concepts.
• Knowledge of networking protocols such as IP, TCP, and UDP.
• Experience verifying designs with high-speed interfaces such as PCIe, Ethernet, and/or DDR.
• Familiarity with C programming and scripting in Python and/or Perl.

Responsibilities

• Verify and maintain high-performance FPGA compute and networking systems used in electronic trading.
• Contribute to verification from specification and test planning through testbench development, execution, and coverage closure.
• Partner with design engineers to develop, review, and execute comprehensive test plans.
• Create and maintain reusable verification components and testbenches written in SystemVerilog.
• Use simulation and debugging tools to identify, investigate, and resolve design issues.
• Contribute to improving verification processes, tools, and methodologies.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level