Gate-level IR/EM CAD/NLP Engineer

Apple • Austin, TX

35d

About The Position

As a member of Apple’s CAD Group, the Gate-level IR/EM CAD/NLP Engineer will help develop an analytical platform to identify and recommend solutions for signoff IR/EM analysis. The role spans silicon design disciplines and stages, applying machine learning and large language model technologies to provide more accurate and efficient design feedback. Applications include large-data summarization, information retrieval, triage, and chatbot development, alongside traditional silicon design areas such as static and dynamic IR analysis, signal and power grid extraction, STA timing, signal and power EM analysis, and signoff.

The engineer will develop ML and LLM applications for understanding, explaining, and interacting with EDA software; connect those applications to extensive compute infrastructure; and generate customized reports and dashboards to identify IR/EM issues and recommend solutions that improve power-grid integrity. The role also involves automating and streamlining IR/EM analysis and signoff flows, collaborating with design groups on their requirements, and working with EDA vendors to improve solution efficiency and capacity. The position calls for a hands-on, self-motivated contributor who works well in dynamic, collaborative settings and pays close attention to detail.

Requirements

• Bachelor of Science degree and at least 3 years of relevant industry experience.
• Experience developing object-oriented programs, using data structures, and writing algorithms.
• Experience writing machine-learning algorithms, implementing natural language processing, or using large language models in industry applications.
• Proficiency with a UNIX shell environment, Python, and code revision control.
• Ability to coordinate and drive initiatives with little to no oversight.
• Excellent communication and presentation skills.

Nice To Haves

• Experience with EDA tools, CAD flows, or tool flow methodology (TFM).
• Knowledge of some place-and-route (PNR) implementation and/or EMIR analysis flows.
• Experience with electrical-engineering machine-learning applications.
• Experience with large language models, including fine-tuning, retrieval-augmented generation, and prompt engineering.

Responsibilities

• Develop ML and large language model applications to understand, explain, and interact with EDA software.
• Design and implement the applications’ interaction with extensive compute infrastructure.
• Generate customized reports and dashboards to identify IR/EM issues and recommend solutions to improve power-grid integrity.
• Identify opportunities to automate and streamline IR/EM analysis and signoff flows.
• Support and collaborate with physical-design and integration, circuit-design, power, package and system, and technology design groups on IR/EM requirements for analysis flows.
• Work with EDA vendors to enhance and develop solutions that improve efficiency and capacity.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level