Copy of Director, Package Design Engineering

Renesas Electronics•Phoenix, CA

About The Position

This role focuses on the design and development of package and interconnect methods for Renesas’s AI/Datacenter Infrastructure Power packaging needs, specifically Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages. The scope also involves Wide Bandgap (WBG) development, including SiC & GaN, along with DBC, AMB substrates, and advanced interconnect technologies. The position requires managing package technology development, R&D, global OSAT management for new package development and product qualification, technology roadmap definition, R&D budget management, and customer adoption programs. Knowledge of wafer level, flip-chip, multi-chip module, and power devices is beneficial. The role involves benchmarking, selecting, and qualifying materials, processes, and subcontractors (OSAT) or contract manufacturers (CM). It also includes developing and optimizing processes with OSAT/CM, working with product groups and the reliability team for package and process qualification, resolving process integration issues, establishing production controls, and ensuring a smooth transition into production with ramp-up monitoring. The Director will also monitor and resolve process issues in the production phase to ensure high-quality shipments, develop and maintain technical expertise in power SiP/modules, wafer-level packaging, and flip-chip interconnects, participate in packaging roadmap development, and address customer complaints by collaborating with Marketing, Product groups, Quality, and Operations organizations. Establishing and maintaining package design rules is also a key responsibility.

Requirements

Doctorate/Masters / Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering
15 to 20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
Strong interpersonal and communication skills
Strong analytical and presentation skills

Nice To Haves

Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus
Knowledge of wire-bonding & multi-chip module technologies a plus

Responsibilities

Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification
Technology Roadmap definition
R&D budget management & customer adoption programs
Design and development of package and interconnect methods for AI/Datacenter Infrastructure Power packaging needs (Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages)
WBG (SiC & GaN) development along with DBC, AMB substrates and advanced interconnect technologies
Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM)
Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec
Work with Product groups and Reliability team, qualify new packages and processes within required time frame
Resolve all process integration issues by ensuring all window checks are done on critical process steps
Establish production controls and monitors to ensure there is no room for quality incidents
Ensure smooth transition into production & implement ramp up monitor
Work with OSAT/CM to monitor and resolve process issues early in the production phase to ensure only parts with superior quality shipped to customer
Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging & flip chip interconnects
Participate in packaging roadmap development & focus on execution
Address internal and external customer complaints working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses
Establish & maintain package design rules