About The Position

Join Apple’s team developing complex mixed-signal IPs for custom integrated circuits. The team has shipped hundreds of millions of chips into Apple product lines and is developing chips for future products. In this role, you will create high-speed behavioral models for complex analog IPs that interface with digital control logic. These models close the loop in mixed-signal simulations, help catch cross-domain bugs, and provide 10x to 1000x speedups over transistor-level simulations. You will work with system architects, analog designers, and digital teams to develop models, testbenches, and verification methods that accelerate simulation and support tapeout readiness.

Requirements

  • Bachelor of Science degree.
  • At least 3 years of relevant industry experience.

Nice To Haves

  • Master’s degree in a relevant field of study.
  • Experience developing digital logic or behavioral models for analog and mixed-signal circuits, such as SystemVerilog, Real Number Modeling (RNM), or Verilog-A/AMS.
  • Solid fundamentals in digital design and RTL development using SystemVerilog or Verilog.
  • Good knowledge of analog circuits and architectures, such as power converters, regulators, references, ADCs, and DACs.
  • Experience with industry-standard simulation and verification tools, such as Xcelium and Virtuoso.
  • Strong debugging and cross-functional communication skills.

Responsibilities

  • Collaborate with system architects, analog designers, and digital teams to establish precise model specifications for mixed-signal IPs.
  • Develop high-speed models from schematics and design specifications.
  • Build mixed-signal testbenches and integrate models into projects to close the simulation loop.
  • Develop verification plans, run regression suites, and debug digital and analog corner cases.
  • Correlate model accuracy and performance against transistor-level SPICE simulations.
  • Drive modeling methodologies to accelerate simulation turnaround times and ensure tapeout readiness.
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