Mixed Signal Design Verification Engineer

Intel Corporation•Austin, TX

4d•$122,440 - $200,340•Hybrid

About The Position

Intel is hiring a Mixed Signal Design Verification Engineer to perform functional verification of mixed-signal logic components, including analog behavioral modeling, and confirm that designs meet specification requirements. The role develops IP verification plans, test benches, and verification environments to cover mixed-signal microarchitecture specifications; executes verification plans and system simulation models to verify designs, analyze power and timing, and uncover bugs; and reproduces, diagnoses, and debugs presilicon issues. The engineer implements corrective measures for failing tests and collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and meet functional, performance, and power goals. The role also documents test plans, leads technical reviews of plans and proofs with design and architecture teams, and maintains and improves functional verification infrastructure and methodology. The position is eligible for Intel's hybrid work model, splitting time between the assigned Intel site and off-site.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3 or more years of experience; or a master's degree in one of these fields and 2 or more years of experience.
Directly applied experience in digital logic.
Experience with VHDL, Verilog, or SystemVerilog.
Testbench component development experience, preferably in OVM/UVM.
Design debugging skills.

Nice To Haves

7 or more years of related experience.
Analog debugging skills.
Real-number (current, voltage) simulation modeling and debugging skills.

Responsibilities

Perform functional verification of mixed-signal logic components, including analog behavioral modeling, to ensure designs meet specification requirements.
Develop IP verification plans, test benches, and verification environments to provide coverage of mixed-signal microarchitecture specifications.
Execute verification plans and define and run system simulation models to verify designs, analyze power and timing, and uncover bugs.
Replicate, root-cause, and debug issues in the presilicon environment.
Find and implement corrective measures to resolve failing tests.
Collaborate with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and meet functional, performance, and power goals.
Document test plans and drive technical reviews of plans and proofs with design and architecture teams.
Maintain and improve existing functional verification infrastructure and methodology.