Design Verification Architect / Director
About The Position
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As a Design Verification Team Director, lead and run the Processor Verification team, you will be responsible for the verification of microprocessor cores and their peripherals. Relevant experience in-order/out-of-order CPU cores and memory subsystem strongly preferred. Crafting verification plans and executing them to verify highly complex CPU designs. You will implement simulation or emulation testbenches, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will be responsible for coverage collection and closure. You will work closely with cross-functional teams (DV/Arch/Design/FW) to identify coverage scope. Tracking and reporting the work of 7-10 engineers.
Requirements
- 17+ years of design verification experience
- BS (or higher) in EE/Computer Engineering
- Proven experience at leading/managing team.
- Strong managerial, leadership and interpersonal skills
- Excellent knowledge of computer architecture and design verification fundamentals
- Thorough understanding of System Verilog, UVM, and other programming languages to build flexible and reusable complex testbenches
- Exposure to scripting languages like Perl, Unix shell or similar languages
- Experience with assembly language programming required
- Excellent written and oral communication skills necessary
- Knowledge of processor verification required
Nice To Haves
- Relevant experience in-order/out-of-order CPU cores and memory subsystem strongly preferred
- Experience with Formal Verification will be a plus
- Experience with the development of fully automated flows
- Experience with Gate Level Simulations
Responsibilities
- Lead and run the Processor Verification team.
- Responsible for the verification of microprocessor cores and their peripherals.
- Craft verification plans and execute them to verify highly complex CPU designs.
- Implement simulation or emulation testbenches, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
- Responsible for coverage collection and closure.
- Work closely with cross-functional teams (DV/Arch/Design/FW) to identify coverage scope.
- Track and report the work of 7-10 engineers.
Benefits
- paid vacation and paid holidays
- 401(k) plan with employer match
- employee stock purchase plan
- a variety of medical, dental and vision plan options
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What This Job Offers
Job Type
Full-time
Career Level
Director
