Design Verification Lead

Neurophos • Austin, TX

1d • Onsite

About The Position

Neurophos is developing a novel AI compute architecture using silicon photonics to overcome the power and performance limitations of traditional electronic circuits. Our optical cells enable unprecedented density and energy efficiency for large-scale AI inference. We have secured $110M in Series A funding and are looking for a Design Verification Lead to join our world-class team and shape the future of computing.

Requirements

• 8 to 15 years in design verification, including leading verification on a GPU-class or complex compute ASIC through tapeout.
• Deep UVM and SystemVerilog expertise, including ownership of testbench architecture, formal verification, coverage analysis and CI/CD methodology.
• Gate-level simulation experience.
• Verification experience on a chip with many independently developed blocks and analog components, including integration of analog models.
• Comfort standing up a verification environment end to end, including emulation infrastructure.
• Breadth across the flow, from module-level simulation through SoC integration and into validation planning.

Nice To Haves

• Hands-on emulation experience, Palladium or equivalent.
• Development of analog models using WREAL or equivalent descriptions.
• FPGA-based verification or prototyping experience.
• Cadence toolchain experience.
• Experience using AI tooling to accelerate testbench development and coverage closure.
• Exposure to silicon photonics or optical component verification.

Responsibilities

• Own verification methodology and testbench architecture, built on UVM with a strong emphasis on AI driven flows.
• Build the verification plan across levels: module-level simulation, SoC integration, interface checks, top-level IO, and how each feeds the validation plan.
• Specify, evaluate and Integrate third party VIP into the environment.
• Own gate-level simulation with SDF-annotated timing as part of tapeout closure.
• Extend our FPGA-based verification harness so modules can be exercised with real code, quickly, without burning simulator licenses.
• Stand up and operate our emulation environment, including provisioning and execution on cloud-hosted infrastructure.
• Use AI tooling to generate and iterate testbenches and assertions, optimizing based on coverage feedback, and iterating to ensure high quality verification.
• Build and lead the verification team, partnering with system architecture, RTL design, physical design, DFT and validation.

Benefits

• 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
• Unlimited PTO.
• 401(k) matching and stock option opportunities.
• Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
• Personalized Benefits: Choose the plans that fit your life and take the cash back for those that don’t.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed