Design for Test Engineer

Apple • Cupertino, CA

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About The Position

Apple Inc. is hiring a Design for Test Engineer in Cupertino, California, and various unanticipated locations throughout the USA. The role supports assigned projects by preparing project collateral, reviewing design specifications with designers, and verifying scan dumps at the RTL level and across projects. It also includes emulation-level and PAGATE-level verification, identifying and resolving bugs in collaboration with designers, and supporting other teams with issues that arise after design verification. The position is 40 hours per week.

The role requires a master’s degree or foreign equivalent in Electrical Engineering or a related field, plus four years of experience in the job offered or a related occupation. Required experience includes design-for-test verification, scan testing and waveform analysis, hardware specification and RTL analysis, verification automation, bug tracking and resolution, and debug using waveform and design-debug tools.

The listed base pay range is $207,673–$225,300 per year. Apple also describes potential stock awards and employee stock purchase opportunities, medical and dental coverage, retirement benefits, discounted products and free services, reimbursement for certain career-related educational expenses, and possible discretionary bonuses or commission payments and relocation. Benefits and compensation are subject to eligibility and applicable plan terms.

Requirements

• Master’s degree or foreign equivalent in Electrical Engineering or a related field.
• Four years of experience in the job offered or a related occupation.
• Experience with bug triage and resolution management using a formal bug-tracking system, such as JIRA or Radar.
• Experience verifying advanced Design for Test (DFT) functions, including scan and core-level testing.
• Experience performing scan testing and waveform analysis in Synopsys Verdi using a developed model.
• Knowledge of computer architecture, including pipelining, caching, and memory management, applied to verification strategies.
• Experience with SystemVerilog features, including constrained-random stimulus generation and assertion-based verification, and with Verilog.
• Experience using scripting languages such as Perl, Python, or Tcl to automate verification workflows and generate project collateral.
• Experience analyzing hardware design specifications and SystemVerilog/Verilog RTL code, conducting specification reviews, creating verification plans, and identifying potential design flaws.
• Experience using waveform viewers and debug tools such as Verdi or DVE to trace failures to root cause.
• Working knowledge of DFT principles, including scan chains and ATPG patterns.

Responsibilities

• Set up projects and generate project collateral.
• Conduct design specification reviews with designers.
• Conduct scan dump verification at the RTL level for assigned projects.
• Verify scan dumps for assigned projects.
• Conduct emulation-level verification for assigned projects.
• Conduct PAGATE-level verification for assigned projects.
• Identify bugs and remediate them in collaboration with designers.
• Support other teams with issues arising after design verification.
• Use bug-tracking systems to file detailed reports, track issue status, and drive problems to closure with design and other relevant teams.
• Automate simulation-environment setup, test configuration generation, log parsing, and regression management scripts.
• Analyze hardware design specifications and RTL code, conduct specification reviews, create verification plans, and identify potential design-architecture flaws.
• Debug test failures to their root cause in source code or netlists and provide actionable information to design teams.
• Verify scan dumps, debug mismatches between DFT reports and simulation results, and support the connection between pre-silicon verification and post-silicon testing.

Benefits

• Comprehensive medical coverage.
• Dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain educational expenses, including tuition, for formal education related to career advancement at Apple.
• Potential discretionary bonuses or commission payments.
• Potential relocation assistance.
• Opportunity to receive discretionary restricted stock unit awards.
• Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level