Core RTL/Microarchitecture Power Lead
About The Position
AMD is seeking an experienced processor designer to analyze and drive power-efficient microarchitecture development for the Core pipeline of next-generation processors. The role focuses on evaluating and optimizing power consumption in collaboration with RTL, Architecture, Physical Design, and Validation teams. The successful candidate will bring extensive microprocessor development experience, a record of delivering high-quality products on schedule, and a broad understanding of low-power design techniques, microprocessor architecture, and RTL logic design. The position is located in Santa Clara, California, and is not eligible for visa sponsorship.
Requirements
- Expert-level experience in high-performance microprocessor design.
- Strong experience with low-power design techniques and industry tools in a CPU, GPU, or similarly complex device.
Nice To Haves
- Register Transfer Level (RTL) coding for high-speed designs.
- Verilog/SystemVerilog, RTL methodology, and coding practices.
- Logic design experience.
- Experience with performance simulators, workloads, and analyzing their results.
- Low-power coding and techniques.
- Exposure to verification methods.
- Experience with timing closure, physical design, synthesis, or place and route.
- Problem-solving and debugging skills.
- Excellent communication and documentation skills.
- Experience using AI and LLMs to aid development, improve quality, and automate workflows.
- Scripting experience in Ruby, Python, Perl, or Shell.
- MS in EE, CE, or CS, plus years of relevant experience.
Responsibilities
- Analyze power consumption of new and existing microarchitectural features in next-generation high-performance CPU cores, and propose and drive new features and optimizations to existing logic.
- Analyze power characteristics of current server and client CPU workloads and use findings to influence microarchitecture decisions.
- Collaborate with the RTL team to improve implementations and interpret power-analysis results from tools such as PTPX; help estimate dynamic power consumption and potential savings from design optimizations.
- Collaborate with the Physical Design team to achieve low power using the latest fabrication technologies.
- Collaborate with the Design Verification team to generate tests that activate the functions under study.
- Validate feature power consumption in silicon, analyze discrepancies with pre-silicon projections, and provide feedback to the design process.
- Work with tools and methodologies teams to define and update power-analysis tools, and use AI to develop tools and improve workflows.
- Deliver high-quality products on schedule while working collaboratively with engineering teams.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
No Education Listed
