ASIC Design Verification Engineer, Google TPU

Google•Sunnyvale, CA

5h•$138,000 - $197,000

About The Position

As an ASIC Design Verification Engineer on Google's TPU team, you will help develop custom silicon for AI/ML hardware acceleration. You will verify complex digital designs, with a focus on TPU architecture and integration into AI/ML-driven systems, and perform direct verification in active projects using problem-solving skills. The role is part of Google's AI and Infrastructure team, which delivers AI and infrastructure capabilities at scale for Google teams, Cloud customers, and users worldwide.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
At least 4 years of experience with design verification.
Experience with SystemVerilog or Verilog.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
At least 6 years of experience with silicon design verification.
Experience with industry-standard simulators, revision control systems, and regression systems.
Experience contributing across the entire design and verification life cycle.
Knowledge of ASIC standard interfaces.

Responsibilities

Plan verification for complex digital design blocks by understanding design specifications and working with design engineers to identify important verification scenarios.
Identify and write coverage measures for stimulus and corner cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and demonstrate progress toward tape-out.
Create a constrained-random verification environment using SystemVerilog and UVM.