ASIC Analog Design Engineer
About The Position
As an ASIC Analog Design Engineer on Micron's ASIC analog design team, you will help shape ASICs used in Micron's tester and controller IP. The role focuses on designing and developing high-speed PHYs in deep sub-micron technologies. Candidates meeting the minimum qualifications may be considered across multiple experience levels. You will contribute to circuit architecture and specification development, schematic design and simulation, analog layout and floorplanning, and investigation of layout-related performance issues. The position also involves communicating design choices and tradeoffs to the design team and customers, coordinating requirements with package and board teams, and participating in silicon bring-up, characterization, validation, and debug. This is a full-time position. The estimated US base salary range is $106,000–$179,000 per year. Additional compensation may include benefits, bonuses, and equity. Benefits include medical, dental, and vision plans, income-protection programs, paid family leave, paid time off, and paid holidays.
Requirements
- B.S., M.S., or Ph.D. in Electrical Engineering.
- ASIC analog design experience.
- Strong fundamental knowledge of analog and mixed-signal design, advanced CMOS, and FinFET technologies.
- Strong written and verbal communication skills.
- Deep understanding of analog and mixed-signal circuits.
- Understanding of architectural tradeoffs in high-speed SerDes and PHYs.
- Understanding of mismatch analysis, Monte Carlo methods and simulations, transistor-level circuit noise analysis, device physics, and deep sub-micron issues.
- Experience with industry-standard tools and flows, including Cadence ADE, Spectre, AMS verification, EM/IR flows, MATLAB, and Pegasus.
- Understanding of signal integrity, power delivery, and ESD fundamentals.
- Interest in using AI-enabled automation to maximize design efficiency.
- Curiosity and willingness to contribute, learn, and grow.
Nice To Haves
- Experience designing circuits to standards for high-speed memory interfaces such as DDR3/4/5, LPDDR3/4x/5, or GDDR5/6, or SerDes interfaces such as PCIe, M-PHY, HDMI, USB, or SATA.
- Prior ownership of at least one sub-block, such as a PLL, DLL, CDR, high-speed receiver with equalization, transmitter front end, or high-speed data path.
- Knowledge of system-level modeling using VerilogA or Python.
Responsibilities
- Work as part of a high-speed PHY design team using deep sub-micron technology nodes.
- Propose circuit architectures, refine electrical specifications, draw schematics, verify designs through simulation, and present designs to the design team.
- Supervise complex or sensitive analog layout and define block floorplans.
- Investigate parasitics to debug and resolve layout-related performance issues.
- Present complex engineering ideas to the design team and customers, explaining design choices and tradeoffs.
- Explore design alternatives and provide feedback on circuit architectures, design tradeoffs, and specification and requirement tradeoffs.
- Align requirements and provide feedback to package and board teams.
- Plan and participate in silicon bring-up and characterization, and correlate results with simulations.
- Work with the validation team to perform tests, analyze data, and design experiments to resolve challenging silicon debug issues.
Benefits
- Medical insurance plans
- Dental insurance plans
- Vision insurance plans
- Income protection benefits if unable to work due to illness or injury
- Paid family leave
- Paid time off
- Paid holidays
- Bonuses may be included as additional compensation
- Equity may be included as additional compensation
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What This Job Offers
Job Type
Full-time
