Principal Analog/Mixed-Signal ASIC Design Engineer

Taara•Sunnyvale, CA

1d•$258,000 - $294,000•Hybrid

About The Position

Taara, born at X (Google’s Moonshot Factory), is working to connect people without abundant and affordable internet through high-throughput, long-range free-space optical communication. Its links use eye-safe lasers between terminals to transmit high-speed data wirelessly. The team is developing next-generation wireless optical communication systems based on integrated optical phased arrays. The Principal Analog/Mixed-Signal ASIC Design Engineer will work on co-integrated electronic and photonic modules as part of an R&D team. The engineer will own ASIC design blocks and contribute to ASIC tape-out, delivery, and validation, collaborating with a small team of ASIC design, layout, and test engineers. The position involves hands-on analog/mixed-signal ASIC design, verification, and layout, with a focus on high-precision circuits and experience delivering ASICs through commercial foundries. The role also contributes to chip architecture, system-level optimization, and product strategy. Taara is seeking someone motivated by challenging technical problems and comfortable working in an ambiguous, small-team environment. A hybrid or onsite arrangement in Sunnyvale, California, is preferred; remote work may be considered. Relocation assistance can be provided.

Requirements

Ph.D. in Electrical Engineering or a related field.
10 or more years of relevant industry experience in analog/mixed-signal circuit design and implementation in modern CMOS technologies, with demonstrated achievements.
Deep design expertise in high-precision circuits, including analog-to-digital converters, digital-to-analog converters, bandgap references, voltage regulators, amplifiers, and supporting circuitry.
Tape-out experience in high-voltage Bipolar-CMOS-DMOS (BCD) technology, including successful silicon bring-up and characterization.
Extensive experience integrating and co-simulating analog and digital circuits in mixed-signal design and verification.
Hands-on experience contributing to multiple ASIC tape-outs at commercial foundries, including chip top-level ownership.
Hands-on experience with DRC, LVS, PI, and SI verification.

Nice To Haves

Expertise planning and executing verification of large SoCs incorporating complex digital logic and numerous custom-designed blocks.
Fluency in hardware description languages, such as RTL, and RTL-to-GDS design flows using industry-standard EDA tools.
Experience with versioning tools such as SOS and Git.
Proficiency with commercial layout verification software such as Calibre or equivalent.
Excellent communication and presentation skills, including the ability to work effectively with senior external partners.
A track record of advancing a product from prototype to final production.

Responsibilities

Own and deliver custom ASIC blocks for co-integration with large-scale photonic integrated circuits to form integrated modules.
Contribute to chip architecture, system-level optimization, and product strategy.
Contribute to ASIC tape-out, delivery, and validation.
Perform hands-on analog/mixed-signal ASIC design, verification, and layout.
Contribute to the integration and co-simulation of analog and digital circuits for mixed-signal design and verification.
Contribute to multiple ASIC tape-outs at commercial foundries, including chip top-level ownership.
Perform or contribute to Design Rule Checks (DRC), Layout Versus Schematic (LVS), Power Integrity (PI), and Signal Integrity (SI) verification.
Support silicon bring-up and characterization for ASICs fabricated in high-voltage BCD technology.