Principal Analog Mixed-Signal Design Engineer

SiTime Corporation•Santa Clara, CA

5d•$148,320 - $203,940

About The Position

SiTime is seeking a Principal Analog Mixed-Signal Design Engineer to lead the development of analog mixed-signal ICs and own top-level design. The role develops analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes, analyzes technology, architecture, circuit-design, and parametric trade-offs, and performs transistor-level design and simulation using industry-leading EDA tools. The engineer supervises and reviews block designers’ work, leads design reviews, supervises analog circuit physical-design layout, and edits layouts. The role collaborates with cross-functional teams on chip architecture for DFT, verification planning, bench validation, qualification, final-test development, and rapid silicon bring-up through production release. It owns the top-level schematic and top-level analog simulations, works with the verification team to define the verification matrix, and participates in top-level AMS verification. SiTime states that candidates need not meet every listed requirement to be qualified. The position requires a relevant degree and substantial experience, including a track record of taking at least one analog-mixed-signal product to high-volume production. Compensation includes base salary, eligibility for a quarterly bonus tied to innovation goals, and equity grants. The listed pay range is $148,320–$203,940 USD.

Requirements

B.Sc. with at least 10 years of relevant experience, or Ph.D. with 6 years of relevant experience, in Electrical Engineering.
Proven track record of taking at least one analog-mixed-signal part to high-volume production.
Experience developing circuit architectures and conducting technical feasibility studies.
Experience writing detailed block-level specifications and review documents.
Detailed design and simulation experience with one or more of: oscillators, ADCs, DACs, temperature sensors, integer and fractional-N PLLs, digital PLLs, low-noise op-amps, regulators, bandgap circuits, subthreshold circuits, or related architectures in CMOS or BiCMOS processes.
Proficiency with EDA tools including Cadence Virtuoso, Spectre, ADE, mixed-mode AMS tools, and Layout XL.
Extensive knowledge of layout effects and the ability to supervise layout designers.
Extensive experience with post-layout extraction and verification.
Experience with validation, characterization, qualification, and production-release criteria.
Ability to communicate and work effectively with geographically dispersed mixed-signal, digital, and verification engineering teams.
Ability to work independently and drive solutions to challenging problems.
English proficiency sufficient to communicate, collaborate, and perform job responsibilities in a professional business environment.

Nice To Haves

Strong team player.

Responsibilities

Lead development of analog mixed-signal ICs and own the top level.
Supervise and review block designers’ work and hold design reviews.
Work with cross-functional teams to architect the chip for DFT.
Support cross-functional teams with bench validation, qualification, and final-test development.
Develop analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes.
Analyze technology, architecture, circuit-design, and parametric-design trade-offs to meet technical performance specifications.
Perform transistor-level design and simulation using industry-leading EDA tools.
Lead comprehensive design reviews.
Supervise analog circuit physical-design layout and edit layouts.
Collaborate with Digital Design, CAD, Systems Engineering, Test Engineering, and Applications teams on DFT and DFM features, silicon bring-up, and production release.
Work with the verification team to define the verification matrix.
Own the top-level schematic and run top-level analog simulations.
Participate in top-level AMS verification.