Principal Analog/Mixed Signal CAD Engineer

Marvell Technology•Santa Clara, CA
•$150,680 - $225,700

About The Position

Marvell is hiring a Principal Analog/Mixed Signal CAD Engineer to architect and support next-generation automated analog/mixed-signal (AMS) design flows used across its design teams. The role focuses on developing and supporting parasitic extraction flows, including extraction setup, validation, debugging, and post-layout flows, across advanced FinFET, BiCMOS, SiGe, and silicon photonics technologies. The engineer will build and maintain custom tools, PCells, Pycells, GUI utilities, and automation and productivity tools in Cadence Virtuoso, Synopsys OptoCompiler, and Siemens Calibre environments. The role also includes installing, validating, and supporting foundry PDKs; setting up and maintaining physical verification flows and parasitic extraction; and partnering with analog designers and EDA vendors to resolve complex flow challenges. The engineer will help shape company-wide CAD infrastructure and best practices for analog, mixed-signal, and silicon photonics development. The position requires a BSEE with 10–15 years of professional experience, or an MS/PhD in Electrical Engineering with 5–10 years of industry experience. The expected base pay range is $150,680–$225,700 per annum. The role is eligible for Marvell bonus and equity plans, including a new-hire equity grant and annual equity refreshers. Marvell also describes benefits spanning financial well-being, family support, mental and physical health, and recognition.

Requirements

  • BSEE with 10–15 years of professional experience, or MS/PhD in Electrical Engineering with 5–10 years of industry experience.
  • Proven experience building and maintaining analog/mixed-signal design flows for advanced FinFET, BiCMOS, SiGe, and SiPho technologies.
  • Strong hands-on experience with industry-standard AMS design tools, including Cadence Virtuoso Studio, Synopsys OptoCompiler, and Siemens Calibre.
  • Solid understanding of analog/mixed-signal design flows, including schematic capture, simulation, parasitic extraction, post-layout verification, and EMIR.
  • Programming or scripting experience in Python, TCL, Shell, and SKILL.
  • Experience developing custom CAD automation or verification frameworks.
  • Excellent communication skills and ability to collaborate effectively with cross-functional teams.

Nice To Haves

  • Familiarity with silicon photonics design flows.

Responsibilities

  • Architect and support next-generation automated AMS design flows used across Marvell design teams.
  • Develop and support parasitic extraction flows, including extraction setup, validation, debugging, and post-layout flows.
  • Build and maintain custom tools, PCells, Pycells, GUI utilities, and automation and productivity tools within Cadence Virtuoso, Synopsys OptoCompiler, and Siemens Calibre environments.
  • Install, validate, and support foundry PDKs.
  • Set up and maintain physical verification flows and parasitic extraction.
  • Partner with analog designers and EDA vendors to troubleshoot and resolve complex design flow challenges.
  • Help shape company-wide CAD infrastructure and best practices for analog, mixed-signal, and silicon photonics development.

Benefits

  • Eligible to participate in bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
  • Employee stock purchase plan with a 2-year look back.
  • Family support programs to help balance work and home life.
  • Mental health resources.
  • Recognition and service awards.
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