Visiting Student Subcontract - XSD - DET UIC - 11.3.26

Argonne National Laboratory•Lemont, IL

About The Position

The student will support the CMOS+X project by developing and refining an AI-assisted framework for discovering new and better-performing circuits. The framework uses CaDRO for device sizing and SteerGenSE for circuit structure exploration. Working with UIC and Argonne researchers, the student will implement and evaluate search algorithms, improve circuit-generation models, develop robust simulation testbenches, and benchmark candidate designs using Spectre and foundry device models. The work will emphasize cryogenic readout and control circuits, including low-dropout regulators, voltage-controlled oscillators, and switching regulators. It will address performance, stability, power, and reliable operation at 4 K. The student will also help make the framework portable across partner sites and produce reproducible circuit netlists, performance summaries, and documentation for designers.

Requirements

  • The entirety of the appointment must be conducted within the United States.
  • Must be 18 years or older when the appointment begins.
  • Must be currently enrolled in undergraduate or graduate studies at an accredited institution, have graduated from an accredited institution within the past 3 months, or be actively enrolled in a graduate program at an accredited institution.

Responsibilities

  • Develop and refine an AI-assisted framework for discovering improved circuits using CaDRO for device sizing and SteerGenSE for circuit structure exploration.
  • Implement and evaluate search algorithms.
  • Improve circuit-generation models.
  • Develop robust simulation testbenches.
  • Benchmark candidate designs using Spectre and foundry device models.
  • Work on cryogenic readout and control circuits, including low-dropout regulators, voltage-controlled oscillators, and switching regulators, addressing performance, stability, power, and reliable operation at 4 K.
  • Help make the framework portable across partner sites.
  • Produce reproducible circuit netlists, performance summaries, and documentation for designers.
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