Verification Engineer II

Ambarella•Headquarters, KY
•$120,000 - $160,000

About The Position

Ambarella is seeking a motivated Verification Engineer to develop and execute verification solutions for advanced SoCs used in video, image processing, computer vision, and AI applications. The role uses established verification methodologies and modern agentic AI verification flows to develop tests, analyze failures, improve coverage, and accelerate debugging.

Requirements

  • At least a bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Strong understanding of digital logic design and computer architecture.
  • Hands-on experience with Verilog/SystemVerilog and simulation-based verification.
  • Familiarity with UVM, constrained-random testing, and functional coverage.
  • Programming skills in Python and/or C/C++.
  • Strong debugging, problem-solving, and communication skills.

Nice To Haves

  • A master's degree in Electrical Engineering, Computer Engineering, or a related field is preferred.

Responsibilities

  • Develop and maintain verification testbenches using SystemVerilog, UVM, Verilog, C/C++, and Python.
  • Create and execute verification plans for DSP blocks, control logic, processor cores, and specialized accelerators.
  • Verify components of Ambarella's image processing pipeline, video input subsystem, compression engines, and neural network processors.
  • Develop directed and constrained-random tests, assertions, checkers, and coverage models.
  • Debug RTL and testbench failures, analyze simulation results, and resolve coverage gaps.
  • Use and enhance agentic AI verification workflows for test generation, failure analysis, coverage improvement, and debugging automation.
  • Develop Python scripts and utilities to automate verification and regression tasks.
  • Collaborate with RTL design, architecture, and software teams.

Benefits

  • New-hire RSU grants
  • Opportunity for annual RSU grants
  • Other highly competitive benefits
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