Static Timing Analysis Engineer

Silicon Labs•Austin, TX

4d•$160,650 - $298,350•Hybrid

About The Position

The Static Timing Analysis Engineer develops timing constraints and performs timing-closure signoff for low-power wireless SoCs and IP systems. The SoCs are multi-core, multi-threaded processor subsystems with multi-level cache, support multiple wireless protocols and application functions such as sensor hubs and AI/ML, and are designed to meet demanding power targets. They use complex, deeply gated clock networks with many asynchronous clock sources. The role works with designers and a global, cross-functional team to develop IP- and SoC-level constraints, improve static timing analysis flows, establish signoff criteria, analyze timing reports, and resolve timing issues through closure, including for mixed-signal IP integration.

Requirements

Bachelor’s or master’s degree in electrical or computer engineering and 8+ years of experience.
In-depth knowledge of timing-closure flows and methodologies.
Experience developing timing constraints for functional and test modes, such as scan.
Hands-on experience with static timing tools such as Tempus or PrimeTime.
In-depth knowledge of scripting languages such as Perl, Python, Tcl, and shell.
Knowledge of timing-closure modes and corners.
Knowledge of low-power design methodologies, including static/dynamic clock gating, power gating, and dynamic voltage and frequency scaling.
Knowledge of timing model generation for mixed-signal IP.
Knowledge of design flows including Lint, CDC, synthesis, logic equivalence, DFT, and place and route.
Knowledge of Verilog and SystemVerilog.

Responsibilities

Develop timing constraints at both the IP and SoC levels in collaboration with designers.
Improve or evolve existing static timing analysis flows and methodologies.
Develop timing signoff criteria, including aging, on-chip variation, and signal integrity.
Analyze timing reports using scripting techniques to develop insights and drive rapid timing closure.
Collaborate with a global design team to resolve complex static timing issues.
Collaborate with a multifunctional team to drive timing closure for mixed-signal IP integration.

Benefits

Medical plans, including a choice of PPO or Consumer Driven Health Plan with HSA
Dental insurance
Vision insurance
401(k) plan with match and Roth plan option
Equity rewards (RSUs)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-up childcare
Commuter benefits
Legal benefits
Pet insurance
Flexible PTO schedule
Three paid volunteer days per year
Charitable contribution match
Tuition reimbursement
Free downtown parking
Onsite gym
Monthly wellness offerings
Free snacks