Staff - HIG HBM Architecture

Micron Technology • Richardson, TX

7d

About The Position

As part of Micron Technology’s High Bandwidth Memory (HBM) team, this role supports the development of sophisticated analog and mixed-signal circuitry for next-generation memory PHYs and supporting infrastructure. The team works across design, verification, packaging, and test to enable high-performance, scalable memory solutions and successful silicon bring-up.

The Analog Design Engineer contributes to the design, simulation, and validation of mixed-signal and PHY-adjacent circuit blocks. The role supports modeling, simulation, integration, and debug efforts while building foundational expertise in analog, digital, and system-level design.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering or a related field.
• 5 years of experience in analog or mixed-signal design, verification, or PHY-adjacent development.
• Strong understanding of device and circuit fundamentals, including MOS behavior, biasing, gain, stability, and digital logic basics.
• Familiarity with industry tools such as Cadence Virtuoso, Spectre, HSPICE, Xcelium/AMS, or VCS/Verdi.
• Fundamental understanding of digital design concepts, including finite-state machines (FSMs), clock-domain crossing (CDC), reset synchronization, and pipelined architectures.
• Familiarity with RTL verification methodologies using SystemVerilog and exposure to UVM-based verification environments.
• Understanding of VLSI design flows, including simulation, synthesis, static timing analysis (STA), APR, and design verification.
• Experience using Linux-based development environments and version control systems.
• Strong analytical and debugging skills, with the ability to identify and resolve design and verification issues.
• Experience using AI-enabled or AI-assisted tools to support simulation, modeling, data analysis, or engineering productivity improvements.

Nice To Haves

• Familiarity with Verilog-A/AMS, real-number modeling, or post-layout concepts such as parasitic extraction and analysis.
• Exposure to statistical or Monte Carlo simulation techniques and mixed-signal verification workflows.
• Experience with memory interfaces, HBM architectures, or mixed-signal IP integration through coursework or internships.
• Exposure to high-speed interface concepts, including clocking, jitter, termination, sensing, and calibration.
• Background in lab bring-up, silicon debug, or simulation-to-silicon correlation.
• Programming or scripting experience such as Python or MATLAB for automation and data analysis.

Responsibilities

• Support design and integration of PHY-adjacent and base-die mixed-signal circuits, including schematic implementation and simulation.
• Develop and maintain behavioral models using Verilog-A/AMS, real-number modeling, or SystemVerilog to support system-level verification.
• Perform block-level SPICE and mixed-signal simulations, analyzing waveform behavior and corner-case scenarios.
• Assist with validation activities, including parasitic modeling, verification plan support, and calibration and adaptability checks.
• Collaborate with multifunctional teams to support integration, simulation debug, and silicon bring-up readiness.

Benefits

• Choice of medical, dental, and vision plans.
• Programs that help protect income in the event of illness or injury.
• Paid family leave.
• Paid time-off program.
• Paid holidays.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior