Principal HBM Architecture & Circuit Design Engineer

Micron Technology • Boise, ID

4d • $139,000 - $308,000

About The Position

Micron Technology is seeking an engineer to own next-generation HBM core-die architecture and critical DRAM circuit design, influencing bandwidth, power, area, thermal efficiency, and long-term reliability. The role drives architecture definition, circuit feasibility, and Architecture Reference Design (ARD) development across advanced 3D-stacked HBM products. It also supports the design and deployment of AI-enabled solutions intended to improve efficiency and decision-making.

Requirements

• Proven experience in DRAM architecture and circuit design, such as HBM, DDR, LPDDR, GDDR, or equivalent.
• Strong understanding of DRAM array architecture, row and column paths, sensing, datapath, refresh, and reliability mechanisms.
• Hands-on experience with SPICE-based circuit simulation tools such as HSPICE, Spectre, FineSim, PrimeSim, or equivalent.
• Ability to evaluate performance, power, area, thermal, and reliability trade-offs.
• Experience driving architecture decisions and cross-functional technical execution.
• Strong problem-solving and communication skills.

Responsibilities

• Own HBM core-die architecture, including bank and bank-group organization, array partitioning, datapath, refresh, and reliability features.
• Drive critical DRAM circuit design and timing closure for row, column, sensing, and datapath paths.
• Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade-offs.
• Define and validate refresh, row-hammer mitigation, data-retention, and power-efficient operation schemes.
• Lead architecture feasibility studies using transistor-level simulation and physical implementation analysis.
• Develop HBM Architecture Reference Designs (ARD), including golden schematics, timing budgets, and verification methodology.
• Collaborate with Array, Datapath, ECC, TSV, PDN, Layout, Verification, and DFT teams to drive end-to-end design execution.
• Support silicon bring-up, characterization, failure analysis, and architecture-to-design handoff.

Benefits

• Choice of medical, dental, and vision plans.
• Programs that help protect income if unable to work due to illness or injury.
• Paid family leave.
• Paid time off.
• Paid holidays.
• Additional compensation may include bonuses and equity.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: No Education Listed