Sr. Principal Application Engineer, Customer Engagement

Cadence•Austin, TX

6d•Onsite

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This role involves utilizing an engineering background to provide pre-sales and/or post-sales technical customer support, including implementation, training, and maintenance support for Electronic Design Automation (EDA) and semiconductor intellectual property (IP). The engineer will develop innovative solutions and custom methodologies for Cadence’s Digital Design and Signoff tools, tailoring company technologies to customer workflows and respective design performance targets. This includes analyzing customer requirements, driving adoption of Cadence EDA solutions by supporting customer investigations, identifying product gaps, recognizing unmet needs, and delivering technical presentations and demonstrations. The role also requires providing expert-level support by diagnosing and resolving complex issues in Backend Digital Design Implementation, including Synthesis. Mentoring customers and internal teams through technical training sessions, workshops, and customized consulting engagements on best practices across RTL-GDSII flows, including methodology development for physical design closure, low power optimization, and design for manufacturability at advanced nodes (2nm-7nm). Providing expertise in the final stages of design processes in custom designs, improving manufacturing, design checks, and testing iterations. Partnering with internal engineering and sales teams to influence product enhancements and feature development, and working horizontally across various design teams and Cadence R&D engineers to develop new features for Cadence tools. Additionally, gathering and establishing methodology, best practices, and solutions to increase in-house productivity. Must be available to work on projects at various, unanticipated sites throughout the United States.

Requirements

Bachelor’s degree in Electronic Engineering, Electrical Engineering, or related field
Minimum twelve (12) years of post-baccalaureate, progressive experience in the job offered or in a related engineering occupation.
Application Specific Integrated Circuit (ASIC) digital design flow using Cadence Tools
Digital design implementation, Register-Transfer Level (RTL) Synthesis, logic design and synthesis, formal verification, low power design, and timing closure
Industry standard Cadence EDA front end digital implementation tools including Genus, Innovus, Voltus and related Cadence technologies
Application-Specific Integrated Circuit (ASIC) design using Cadence Joules RTL Design Studio
Static Timing Analysis (STA) and Engineering Change Orders (ECOs) to achieve the final design targets
Place and route physical design flow using EDA tools
Low power design methodologies including power intent description and verification
Automation skills using Python, Perl, Tcl, and shell scripting
Must be available to work on projects at various, unanticipated sites throughout the United States.

Responsibilities

Provide pre-sales and/or post-sales technical customer support including implementation, training, and maintenance support for Electronic Design Automation (EDA) and semiconductor intellectual property (IP).
Develop innovative solutions and custom methodologies to Cadence’s Digital Design and Signoff tools, tailoring company technologies to customer workflows and respective design performance targets.
Analyze customer requirements and drive adoption of Cadence EDA solutions by supporting customer investigations, identifying product gaps, recognizing unmet needs, and delivering technical presentations and demonstration.
Provide expert-level support by diagnosing and resolving complex issues in Backend Digital Design Implementation, including Synthesis.
Mentor customers and internal teams by conducting technical training sessions, workshops, and customized consulting engagements on best practices across RTL-GDSII flows, including methodology development for physical design closure, low power optimization, and design for manufacturability at advanced nodes (2nm-7nm).
Provide expertise in the final stages of design processes in custom designs, improving manufacturing, design checks, and testing iterations.
Partner with internal engineering and sales teams to influence product enhancements and feature development.
Work horizontally across various design teams and Cadence R&D engineers to develop new features for Cadence tools.
Gather and establish methodology, best practices, and solutions to increase in-house productivity.