Sr. ASIC Design Engineer

Hewlett Packard Enterprise•Sunnyvale, CA

1d•$158,500 - $321,000•Hybrid

About The Position

HPE Networking’s Silicon group develops high-density networking chips used in routers and switches. The Sr. ASIC Design Engineer works on high-speed ASICs, from specifications through final netlist, and contributes to complex modules and subsystems while collaborating with the Physical Design and Verification teams. The role is hybrid, requiring an average of two days per week in an HPE office.

Requirements

Bachelor’s degree in Electrical Engineering.
At least 5 years of relevant experience.
Strong analytical and problem-solving skills.

Nice To Haves

Master’s degree in Electrical Engineering is strongly desired.
Knowledge of computer architecture or networking protocols through graduate-level coursework or prior work.
Strong Verilog/SystemVerilog coding skills gained through coursework, projects, or work experience.
Knowledge of synthesis, lint, and other state-of-the-art EDA tools.
Excellent written and verbal communication skills.
Knowledge of Perl or Python.
Experience with AI agentic tools.

Responsibilities

Translate functional specifications into detailed micro-architecture specifications that meet power and area requirements.
Implement designs using Verilog or SystemVerilog.
Write functional coverage and SVA to help verification identify corner-case bugs.
Collaborate with the Physical Design team on floorplanning and timing closure.
Identify and fix timing issues in RTL to meet frequency targets.
Work with the Verification team to ensure blocks are fully validated.
Mentor and guide new college-graduate engineers and interns.